From patchwork Wed Feb 28 19:24:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 130049 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp121566lja; Wed, 28 Feb 2018 11:25:01 -0800 (PST) X-Google-Smtp-Source: AH8x224iMFqvGqwM4jR4xktDJFp8ERbFScWa6pIqfqTyqshCGJW9s4efdkK6MD5SAo+AVbQA66WB X-Received: by 10.98.28.202 with SMTP id c193mr18801335pfc.109.1519845901241; Wed, 28 Feb 2018 11:25:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519845901; cv=none; d=google.com; s=arc-20160816; b=Kwd1bEENihm88BULPHjonv5kvr605o1q6seLyCp84h4my0J4h8WzAVjcDN9JDINLSV e++pFhDanL3C3u9z1jCanlYKDq3taRuOCgHXRWsG6ugpmtf1SOFQ+1KRmVlFGioRryXP awEsdrq4ZNJ+HXjId7dvOR2SiwQSqXWmbychbrMQWjDp9KjXVlI9FQdsepHyHflQwjFq XLNKjpZt7/SyZxEMe0cHIKPHGI5hBGqmM2UFnl7yHZafZTpobSp+E+9S3XftdXTQduv1 EmGdSu6020LwyVRu2YnY5AHLmq47yCXuPHQl30vIw8T7KFSkECZveqVuJkeUiagDooZq fROw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=qIbqN4tJ+N+EEcWHbLdd/7eIoAkfvwLm7DpKjJjvSYE=; b=NuClH0OtLFngIRTfu/wIA/3Fr4XtHAX+/VfRZ7eEMRXJrPSYE947uAsQ+DCKV7hjvp ne8kn9VeuFYfVJnGxxjW4IdOLWAxOD6nAeaFoI2RgfGA7UvWFNBNZITxR0LxTwyEomAd CY/5Q5wbnbjqBQmKZqUbmtutOSPFb8jtMz94A5CqOA2KmPxpneU37KaRm/6R8cmRijco KkX5VuT2YwpbljIIoFaxysoGvKPr+clJIuKx3z4toYLdDzaDewdYZsu1K+gxHFEwFtA8 UKkDkssKwerb0kviB9nWNCWkTFAV4+z/mBTbBgNxzVARRIOWxbT47neaBa+1PjLNFchM cnUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=eJfx7J2W; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id g13-v6si1768246plo.243.2018.02.28.11.25.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:25:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=eJfx7J2W; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 38D9E223522B5; Wed, 28 Feb 2018 11:18:47 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2FDE9223522B5 for ; Wed, 28 Feb 2018 11:18:46 -0800 (PST) Received: by mail-wm0-x241.google.com with SMTP id i3so5792164wmi.4 for ; Wed, 28 Feb 2018 11:24:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IpnR5CHMAnD9xNOsB3ZabaF/4F7z5Far0onb4lR0uCo=; b=eJfx7J2WuF4ANw+NBKlhyWdONmX6H76ULCEmhNlFDbcubW7QI4z/o92Fx5G3diP3yP kVF5C00Fh9RXH1K+/XjulAQD2zYK8eXV2IA3dklwlS+64Isw4JpYtc6Jc1Q8skJmnWzN cTyZpfj7lqkISQ9RH62aonzfs13gH46QYE3dg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IpnR5CHMAnD9xNOsB3ZabaF/4F7z5Far0onb4lR0uCo=; b=OrWJaAJW06FFgK4cQpvmuy9PhdCW6AuEbLqM2ZQrJwiHX1xwCPaxAMQVgIlUj4xVF+ SIg3oUGaemc2+MPAXnIzPAYTV6aysJTNhxYo9Jp9ILX2MsvEWBqkl9acTYdGHGBsG5Jw OoxneBhqy1neqf0Wk55xFibELZZHdqSoEz3yy0WyadtJJmRAcPA+IKjuOwz8fflMZOV0 Kxh4RtF4nFSMKWiFaVVetH87N8ozL7iQUa5vhvrpXFeTgE43EiZTeazeHJs3KVA0cLKL LeWbEZ8ehgwjcRBL1fKdS6GCPf9OrBKjcQbDp36TV874MmLC4ShgbL0BGW+vUe8IcPXS GgRA== X-Gm-Message-State: APf1xPD/r5EkCtqYFjkqbCk7VGG/Kpr7J3QVwI9kfRonzHwhxcVhxn1S lqD2KVLXiurIE66faLvFt6jWKwqPXVY= X-Received: by 10.28.229.85 with SMTP id c82mr15885517wmh.76.1519845891910; Wed, 28 Feb 2018 11:24:51 -0800 (PST) Received: from localhost.localdomain ([160.163.57.8]) by smtp.gmail.com with ESMTPSA id 47sm2152312wrb.48.2018.02.28.11.24.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:24:51 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Feb 2018 19:24:21 +0000 Message-Id: <20180228192421.17684-8-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180228192421.17684-1-ard.biesheuvel@linaro.org> References: <20180228192421.17684-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 7/7] Silicon/SynQuacer/AcpiTables: take presence detect of PCI0 into account X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: masahisa.kojima@linaro.org, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" On the SynQuacer Evalution Board, PCIe RC #0 is not clocked if no card is inserted into the PCIe slot, and so any attempt to access the device registers will lock up the system. So let's check the presence detect pin directly in the _STA implementation of PCI0. This needs to be done before the config space check, because that access itself will lock the system if no card is inserted. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 15 +++++++++++++++ Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1 + 2 files changed, 16 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl index 5ffed663e17d..db529aa95220 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl @@ -14,6 +14,7 @@ **/ +#include #include #include "AcpiTables.h" @@ -37,7 +38,21 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR", VPID, 16, } + OperationRegion (GPIO, SystemMemory, SYNQUACER_GPIO_BASE, 8) + Field (GPIO, DWordAcc, NoLock, Preserve) { + , 39, + PRDT, 1, + , 24, + } + Method (_STA, 0x0, Serialized) { + If (!LEqual (FixedPcdGet8 (PcdPcie0PresenceDetectGpioPin), 0xff)) { + Store (PRDT, local0) + If (!LEqual (local0, 0x0)) { + Return (0x0) + } + } + // // Check whether the VID/PID of device #1 on bus #0 equals 0xffff. // If this is not the case, we are dealing with a ghost device, diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf index b1b6bbaa481d..bca8354d1184 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf @@ -62,3 +62,4 @@ [FixedPcd] gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress + gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin