[edk2,edk2-platforms] Silicon/SynQuacer/DeviceTree: use more specific PMU 'compatible string

Message ID 20180301140145.10659-1-ard.biesheuvel@linaro.org
State New
Headers show
Series
  • [edk2,edk2-platforms] Silicon/SynQuacer/DeviceTree: use more specific PMU 'compatible string
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Commit Message

Ard Biesheuvel March 1, 2018, 2:01 p.m.
Replace the PMU compatible string "arm,armv8-pmuv3" with the more
accurate "arm,cortex-a53-pmu", potentially making more event types
available.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.11.0

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Comments

Ard Biesheuvel April 27, 2018, 9:46 a.m. | #1
On 1 March 2018 at 15:01, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> Replace the PMU compatible string "arm,armv8-pmuv3" with the more

> accurate "arm,cortex-a53-pmu", potentially making more event types

> available.

>

> Contributed-under: TianoCore Contribution Agreement 1.1

> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> ---

>  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

>

> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> index fdaccb984483..2db7de3d5b96 100644

> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> @@ -379,7 +379,7 @@

>      };

>

>      pmu {

> -        compatible = "arm,armv8-pmuv3";

> +        compatible = "arm,cortex-a53-pmu";

>          interrupts =  <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

>      };

>


Ping?
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Leif Lindholm April 27, 2018, 9:49 a.m. | #2
On Fri, Apr 27, 2018 at 11:46:04AM +0200, Ard Biesheuvel wrote:
> On 1 March 2018 at 15:01, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

> > Replace the PMU compatible string "arm,armv8-pmuv3" with the more

> > accurate "arm,cortex-a53-pmu", potentially making more event types

> > available.

> >

> > Contributed-under: TianoCore Contribution Agreement 1.1

> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> > ---

> >  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 2 +-

> >  1 file changed, 1 insertion(+), 1 deletion(-)

> >

> > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> > index fdaccb984483..2db7de3d5b96 100644

> > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

> > @@ -379,7 +379,7 @@

> >      };

> >

> >      pmu {

> > -        compatible = "arm,armv8-pmuv3";

> > +        compatible = "arm,cortex-a53-pmu";

> >          interrupts =  <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

> >      };

> 

> Ping?


Apologies, I had failed to spot that patch.

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

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Ard Biesheuvel April 27, 2018, 10:12 a.m. | #3
On 27 April 2018 at 11:49, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Fri, Apr 27, 2018 at 11:46:04AM +0200, Ard Biesheuvel wrote:

>> On 1 March 2018 at 15:01, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

>> > Replace the PMU compatible string "arm,armv8-pmuv3" with the more

>> > accurate "arm,cortex-a53-pmu", potentially making more event types

>> > available.

>> >

>> > Contributed-under: TianoCore Contribution Agreement 1.1

>> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

>> > ---

>> >  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 2 +-

>> >  1 file changed, 1 insertion(+), 1 deletion(-)

>> >

>> > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

>> > index fdaccb984483..2db7de3d5b96 100644

>> > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

>> > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi

>> > @@ -379,7 +379,7 @@

>> >      };

>> >

>> >      pmu {

>> > -        compatible = "arm,armv8-pmuv3";

>> > +        compatible = "arm,cortex-a53-pmu";

>> >          interrupts =  <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

>> >      };

>>

>> Ping?

>

> Apologies, I had failed to spot that patch.

>

> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>


Thanks

Pushed as a991616698ea7e13b15c1d39ffa83f920d8a4ca5
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Patch

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index fdaccb984483..2db7de3d5b96 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -379,7 +379,7 @@ 
     };
 
     pmu {
-        compatible = "arm,armv8-pmuv3";
+        compatible = "arm,cortex-a53-pmu";
         interrupts =  <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
     };