[v3,1/6] soc: samsung: pm_domains: Add blacklisting clock handling

Message ID 20180306143312.21035-2-m.szyprowski@samsung.com
State New
Headers show
Series
  • Exynos5: cleanup clocks handling in power domains
Related show

Commit Message

Marek Szyprowski March 6, 2018, 2:33 p.m.
Handling of clock reparenting will be move to clock controller driver, so
add possibility to blacklist clock handling on systems, where the clock
controller already does all needed operations. This is needed to avoid
potential deadlock on clock reparenting during power domain on/off
procedure.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

---
 drivers/soc/samsung/pm_domains.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.15.0

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Patch

diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index b6a436594a19..cef30bdf19b1 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -147,6 +147,9 @@  static __init const char *exynos_get_domain_name(struct device_node *node)
 	return kstrdup_const(name, GFP_KERNEL);
 }
 
+static const char *soc_force_no_clk[] = {
+};
+
 static __init int exynos4_pm_init_power_domain(void)
 {
 	struct device_node *np;
@@ -183,6 +186,11 @@  static __init int exynos4_pm_init_power_domain(void)
 		pd->pd.power_on = exynos_pd_power_on;
 		pd->local_pwr_cfg = pm_domain_cfg->local_pwr_cfg;
 
+		for (i = 0; i < ARRAY_SIZE(soc_force_no_clk); i++)
+			if (of_find_compatible_node(NULL, NULL,
+						    soc_force_no_clk[i]))
+				goto no_clk;
+
 		for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
 			char clk_name[8];