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Tue, 6 Mar 2018 14:33:25 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20180306143324eucas1p2ec351b007e6c5a1e3a07437ff0aa9e97~ZW10qKBb92640026400eucas1p2-; Tue, 6 Mar 2018 14:33:24 +0000 (GMT) X-AuditID: cbfec7f2-1c1ff70000011644-35-5a9ea6b5a354 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id C6.91.04183.4B6AE9A5; Tue, 6 Mar 2018 14:33:24 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P5600MGHB3ETD00@eusync1.samsung.com>; Tue, 06 Mar 2018 14:33:24 +0000 (GMT) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Inki Dae , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH v3 5/6] soc: samsung: pm_domains: Deprecate support for clocks Date: Tue, 06 Mar 2018 15:33:11 +0100 Message-id: <20180306143312.21035-6-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 In-reply-to: <20180306143312.21035-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHIsWRmVeSWpSXmKPExsWy7djP87pbl82LMjh1Ws5i44z1rBbXvzxn tZh0fwKLxfnzG9gtPvbcY7WYcX4fk8XaI3fZLQ6/aWd14PDYtKqTzaNvyypGj8+b5AKYo7hs UlJzMstSi/TtErgy/hz1KbhiVjFx9Q62BsY2nS5GTg4JAROJrZfOs3YxcnEICaxglNj7YRIL hPOZUaJ95jrGLkYOsKq9rZUQ8WWMEtvfHmAG6RYSaGCS+PhLFsRmEzCU6HrbxQZiiwg4SHz+ 9JoRpIFZoI1J4uyB/UwgCWGBAImll0CKODhYBFQl5r71BQnzCthKXG/6zQ5xkbzE4u87weZw CthJ3Lk0E+wgCYFGNomDM7exQhS5SEw+thvKFpZ4dXwLVLOMxOXJ3SwQdr1E3/cjTBDNPUCv tUxlgkhYSxw+fhGsmVmAT2LStunMEF/ySnS0CUGUeEj8njENqtxRYsb/RkaI7ycyShy49Y55 AqPUAkaGVYziqaXFuempxYZ5qeV6xYm5xaV56XrJ+bmbGIGxePrf8U87GL9eSjrEKMDBqMTD y+E9N0qINbGsuDL3EKMEB7OSCG+E/rwoId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rxxGnVRQgLp iSWp2ampBalFMFkmDk6pBkbOTyf7XJP3/v/iL7plWcL1Lb1qz66Fn/+83mRn7N87Het7Vjmq q+sVJT2/2JmxUab18fNdcxfbXPDS37bxRFixpe/CObuMA92j07a65jp96p/+lK+vrWWJ+NqX yjK++ouzkh8KzvpeZ7nKsXePfyPjrkfNWrWzyq2e3pT5dGKVdAG7JZ/z48dKLMUZiYZazEXF iQA+b3V+wQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgluLIzCtJLcpLzFFi42I5/e/4Zd0ty+ZFGfz8b2KxccZ6VovrX56z Wky6P4HF4vz5DewWH3vusVrMOL+PyWLtkbvsFofftLM6cHhsWtXJ5tG3ZRWjx+dNcgHMUVw2 Kak5mWWpRfp2CVwZf476FFwxq5i4egdbA2ObThcjB4eEgInE3tbKLkYuDiGBJYwS63+8Y4dw mpgkJt5bytTFyMnBJmAo0fW2iw3EFhFwkPj86TUjSBGzQAeTxJ69D8ESwgJ+Eq/+H2MDmcoi oCox960vSJhXwFbietNvdhBbQkBeYvH3nWDlnAJ2EncuzWQBsYWAai5P+M44gZFnASPDKkaR 1NLi3PTcYiO94sTc4tK8dL3k/NxNjMBw2Xbs55YdjF3vgg8xCnAwKvHwbvCYGyXEmlhWXJl7 iFGCg1lJhDdCf16UEG9KYmVValF+fFFpTmrxIUZpDhYlcd7zBpVRQgLpiSWp2ampBalFMFkm Dk6pBkbn7VeXGha2OlquM/II05t3fcP/XS+/PpvBYHeg6j2rPpM7Y92KWbX3M5ckLvQwL86V tP0x/5Hqmv/pe6+nXAzcy5DXvGxC1rZ7d1/8sPktGN6nGGZ95mLAnMP7laaHtT+y+pl+tPHP S5H3nt9WhlZvbSot9HFLLHV0Wv9p6p7M5Vc3qM3QvrlJiaU4I9FQi7moOBEAsYiIJhMCAAA= X-CMS-MailID: 20180306143324eucas1p2ec351b007e6c5a1e3a07437ff0aa9e97 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20180306143324eucas1p2ec351b007e6c5a1e3a07437ff0aa9e97 X-RootMTR: 20180306143324eucas1p2ec351b007e6c5a1e3a07437ff0aa9e97 References: <20180306143312.21035-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Handling of special clock operations on power domain on/off sequences has been moved to respective Exynos clock controller drivers, so there is no need to keep the duplicated (and conflicting) code in Exynos power domain driver. Mark clock related properties in Exynos power domain bindings as deprecated. This change has no inpact on backwards-compatibility, as the new drivers properly work with old DTBs (deprecated properties are ignored). Signed-off-by: Marek Szyprowski --- .../devicetree/bindings/power/pd-samsung.txt | 20 +---- drivers/soc/samsung/pm_domains.c | 90 +--------------------- 2 files changed, 5 insertions(+), 105 deletions(-) -- 2.15.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/power/pd-samsung.txt b/Documentation/devicetree/bindings/power/pd-samsung.txt index 549f7dee9b9d..92ef355e8f64 100644 --- a/Documentation/devicetree/bindings/power/pd-samsung.txt +++ b/Documentation/devicetree/bindings/power/pd-samsung.txt @@ -15,23 +15,13 @@ Required Properties: Optional Properties: - label: Human readable string with domain name. Will be visible in userspace to let user to distinguish between multiple domains in SoC. -- clocks: List of clock handles. The parent clocks of the input clocks to the - devices in this power domain are set to oscclk before power gating - and restored back after powering on a domain. This is required for - all domains which are powered on and off and not required for unused - domains. -- clock-names: The following clocks can be specified: - - oscclk: Oscillator clock. - - clkN: Input clocks to the devices in this power domain. These clocks - will be reparented to oscclk before switching power domain off. - Their original parent will be brought back after turning on - the domain. Maximum of 4 clocks (N = 0 to 3) are supported. - - asbN: Clocks required by asynchronous bridges (ASB) present in - the power domain. These clock should be enabled during power - domain on/off operations. - power-domains: phandle pointing to the parent power domain, for more details see Documentation/devicetree/bindings/power/power_domain.txt +Deprecated Properties: +- clocks +- clock-names + Node of a device using power domains must have a power-domains property defined with a phandle to respective power domain. @@ -47,8 +37,6 @@ Example: mfc_pd: power-domain@10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>; - clock-names = "oscclk", "clk0"; #power-domain-cells = <0>; label = "MFC"; }; diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index caf45cf7aa8e..ab8582971bfc 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -13,14 +13,11 @@ #include #include #include -#include #include #include #include #include -#define MAX_CLK_PER_DOMAIN 4 - struct exynos_pm_domain_config { /* Value for LOCAL_PWR_CFG and STATUS fields for each domain */ u32 local_pwr_cfg; @@ -33,10 +30,6 @@ struct exynos_pm_domain { void __iomem *base; bool is_off; struct generic_pm_domain pd; - struct clk *oscclk; - struct clk *clk[MAX_CLK_PER_DOMAIN]; - struct clk *pclk[MAX_CLK_PER_DOMAIN]; - struct clk *asb_clk[MAX_CLK_PER_DOMAIN]; u32 local_pwr_cfg; }; @@ -46,29 +39,10 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) void __iomem *base; u32 timeout, pwr; char *op; - int i; pd = container_of(domain, struct exynos_pm_domain, pd); base = pd->base; - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_prepare_enable(pd->asb_clk[i]); - } - - /* Set oscclk before powering off a domain*/ - if (!power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - pd->pclk[i] = clk_get_parent(pd->clk[i]); - if (clk_set_parent(pd->clk[i], pd->oscclk)) - pr_err("%s: error setting oscclk as parent to clock %d\n", - domain->name, i); - } - } - pwr = power_on ? pd->local_pwr_cfg : 0; writel_relaxed(pwr, base); @@ -86,26 +60,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) usleep_range(80, 100); } - /* Restore clocks after powering on a domain*/ - if (power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - - if (IS_ERR(pd->pclk[i])) - continue; /* Skip on first power up */ - if (clk_set_parent(pd->clk[i], pd->pclk[i])) - pr_err("%s: error setting parent to clock%d\n", - domain->name, i); - } - } - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_disable_unprepare(pd->asb_clk[i]); - } - return 0; } @@ -147,12 +101,6 @@ static __init const char *exynos_get_domain_name(struct device_node *node) return kstrdup_const(name, GFP_KERNEL); } -static const char *soc_force_no_clk[] = { - "samsung,exynos5250-clock", - "samsung,exynos5420-clock", - "samsung,exynos5800-clock", -}; - static __init int exynos4_pm_init_power_domain(void) { struct device_node *np; @@ -161,7 +109,7 @@ static __init int exynos4_pm_init_power_domain(void) for_each_matching_node_and_match(np, exynos_pm_domain_of_match, &match) { const struct exynos_pm_domain_config *pm_domain_cfg; struct exynos_pm_domain *pd; - int on, i; + int on; pm_domain_cfg = match->data; @@ -189,42 +137,6 @@ static __init int exynos4_pm_init_power_domain(void) pd->pd.power_on = exynos_pd_power_on; pd->local_pwr_cfg = pm_domain_cfg->local_pwr_cfg; - for (i = 0; i < ARRAY_SIZE(soc_force_no_clk); i++) - if (of_find_compatible_node(NULL, NULL, - soc_force_no_clk[i])) - goto no_clk; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "asb%d", i); - pd->asb_clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->asb_clk[i])) - break; - } - - pd->oscclk = of_clk_get_by_name(np, "oscclk"); - if (IS_ERR(pd->oscclk)) - goto no_clk; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "clk%d", i); - pd->clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->clk[i])) - break; - /* - * Skip setting parent on first power up. - * The parent at this time may not be useful at all. - */ - pd->pclk[i] = ERR_PTR(-EINVAL); - } - - if (IS_ERR(pd->clk[0])) - clk_put(pd->oscclk); - -no_clk: on = readl_relaxed(pd->base + 0x4) & pd->local_pwr_cfg; pm_genpd_init(&pd->pd, NULL, !on);