Message ID | 20180309151133.31371-8-andre.przywara@linaro.org |
---|---|
State | New |
Headers | show |
Series | ARM: vGIC: prepare for splitting the vGIC code | expand |
Hi Andre, On 09/03/18 15:11, Andre Przywara wrote: > domain_max_vcpus(), which is used by generic Xen code, returns the > maximum number of VCPUs for a domain, which on ARM is mostly limited by > the VGIC model emulated (a (v)GICv2 can only handle 8 CPUs). > Our current implementation lives in arch/arm/domain.c, but reaches into > VGIC internal data structures. > Move the actual functionality into vgic.c, and provide a shim in > domain.h, to keep this VGIC internal. > > Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Reviewed-by: Julien Grall <julien.grall@arm.com> Cheers, > --- > Changelog: > - rename helper function and wrap in domain.h > > xen/arch/arm/domain.c | 14 -------------- > xen/arch/arm/vgic.c | 14 ++++++++++++++ > xen/include/asm-arm/domain.h | 6 +++++- > xen/include/asm-arm/vgic.h | 2 ++ > 4 files changed, 21 insertions(+), 15 deletions(-) > > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 8de4c0a343..6b902fa30f 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -967,20 +967,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) > vcpu_unblock(current); > } > > -unsigned int domain_max_vcpus(const struct domain *d) > -{ > - /* > - * Since evtchn_init would call domain_max_vcpus for poll_mask > - * allocation when the vgic_ops haven't been initialised yet, > - * we return MAX_VIRT_CPUS if d->arch.vgic.handler is null. > - */ > - if ( !d->arch.vgic.handler ) > - return MAX_VIRT_CPUS; > - else > - return min_t(unsigned int, MAX_VIRT_CPUS, > - d->arch.vgic.handler->max_vcpus); > -} > - > /* > * Local variables: > * mode: C > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 34269bcf27..fa00c21a69 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -665,6 +665,20 @@ void vgic_free_virq(struct domain *d, unsigned int virq) > clear_bit(virq, d->arch.vgic.allocated_irqs); > } > > +unsigned int vgic_max_vcpus(const struct domain *d) > +{ > + /* > + * Since evtchn_init would call domain_max_vcpus for poll_mask > + * allocation when the vgic_ops haven't been initialised yet, > + * we return MAX_VIRT_CPUS if d->arch.vgic.handler is null. > + */ > + if ( !d->arch.vgic.handler ) > + return MAX_VIRT_CPUS; > + else > + return min_t(unsigned int, MAX_VIRT_CPUS, > + d->arch.vgic.handler->max_vcpus); > +} > + > /* > * Local variables: > * mode: C > diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h > index c6aa5cf389..e730e07fcf 100644 > --- a/xen/include/asm-arm/domain.h > +++ b/xen/include/asm-arm/domain.h > @@ -289,7 +289,11 @@ void vcpu_show_execution_state(struct vcpu *); > void vcpu_show_registers(const struct vcpu *); > void vcpu_switch_to_aarch64_mode(struct vcpu *); > > -unsigned int domain_max_vcpus(const struct domain *); > +/* On ARM, the number of VCPUs is limited by the type of GIC emulated. */ > +static inline unsigned int domain_max_vcpus(const struct domain *d) > +{ > + return vgic_max_vcpus(d); > +} > > /* > * Due to the restriction of GICv3, the number of vCPUs in AFF0 is > diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h > index d03298e12c..afb4776ad4 100644 > --- a/xen/include/asm-arm/vgic.h > +++ b/xen/include/asm-arm/vgic.h > @@ -254,6 +254,8 @@ static inline int vgic_allocate_spi(struct domain *d) > > extern void vgic_free_virq(struct domain *d, unsigned int virq); > > +unsigned int vgic_max_vcpus(const struct domain *d); > + > void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, > paddr_t vbase, uint32_t aliased_offset); > >
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 8de4c0a343..6b902fa30f 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -967,20 +967,6 @@ void vcpu_block_unless_event_pending(struct vcpu *v) vcpu_unblock(current); } -unsigned int domain_max_vcpus(const struct domain *d) -{ - /* - * Since evtchn_init would call domain_max_vcpus for poll_mask - * allocation when the vgic_ops haven't been initialised yet, - * we return MAX_VIRT_CPUS if d->arch.vgic.handler is null. - */ - if ( !d->arch.vgic.handler ) - return MAX_VIRT_CPUS; - else - return min_t(unsigned int, MAX_VIRT_CPUS, - d->arch.vgic.handler->max_vcpus); -} - /* * Local variables: * mode: C diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 34269bcf27..fa00c21a69 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -665,6 +665,20 @@ void vgic_free_virq(struct domain *d, unsigned int virq) clear_bit(virq, d->arch.vgic.allocated_irqs); } +unsigned int vgic_max_vcpus(const struct domain *d) +{ + /* + * Since evtchn_init would call domain_max_vcpus for poll_mask + * allocation when the vgic_ops haven't been initialised yet, + * we return MAX_VIRT_CPUS if d->arch.vgic.handler is null. + */ + if ( !d->arch.vgic.handler ) + return MAX_VIRT_CPUS; + else + return min_t(unsigned int, MAX_VIRT_CPUS, + d->arch.vgic.handler->max_vcpus); +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index c6aa5cf389..e730e07fcf 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -289,7 +289,11 @@ void vcpu_show_execution_state(struct vcpu *); void vcpu_show_registers(const struct vcpu *); void vcpu_switch_to_aarch64_mode(struct vcpu *); -unsigned int domain_max_vcpus(const struct domain *); +/* On ARM, the number of VCPUs is limited by the type of GIC emulated. */ +static inline unsigned int domain_max_vcpus(const struct domain *d) +{ + return vgic_max_vcpus(d); +} /* * Due to the restriction of GICv3, the number of vCPUs in AFF0 is diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index d03298e12c..afb4776ad4 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -254,6 +254,8 @@ static inline int vgic_allocate_spi(struct domain *d) extern void vgic_free_virq(struct domain *d, unsigned int virq); +unsigned int vgic_max_vcpus(const struct domain *d); + void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, paddr_t vbase, uint32_t aliased_offset);
domain_max_vcpus(), which is used by generic Xen code, returns the maximum number of VCPUs for a domain, which on ARM is mostly limited by the VGIC model emulated (a (v)GICv2 can only handle 8 CPUs). Our current implementation lives in arch/arm/domain.c, but reaches into VGIC internal data structures. Move the actual functionality into vgic.c, and provide a shim in domain.h, to keep this VGIC internal. Signed-off-by: Andre Przywara <andre.przywara@linaro.org> --- Changelog: - rename helper function and wrap in domain.h xen/arch/arm/domain.c | 14 -------------- xen/arch/arm/vgic.c | 14 ++++++++++++++ xen/include/asm-arm/domain.h | 6 +++++- xen/include/asm-arm/vgic.h | 2 ++ 4 files changed, 21 insertions(+), 15 deletions(-)