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[81.169.180.215]) by mx.google.com with ESMTP id m13si30726edi.305.2018.03.13.05.03.47; Tue, 13 Mar 2018 05:03:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Mv3KT5l0; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id E10DBC21E15; Tue, 13 Mar 2018 12:03:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D827BC21E07; Tue, 13 Mar 2018 12:01:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 86AC4C21C2F; Tue, 13 Mar 2018 12:01:51 +0000 (UTC) Received: from mail-wr0-f196.google.com (mail-wr0-f196.google.com [209.85.128.196]) by lists.denx.de (Postfix) with ESMTPS id 39B7FC21D4A for ; Tue, 13 Mar 2018 12:00:32 +0000 (UTC) Received: by mail-wr0-f196.google.com with SMTP id s18so7936626wrg.9 for ; Tue, 13 Mar 2018 05:00:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=J+vTUWRSZsTyuZCf0w6fyQq5wgRfN9zDPPdK9SFmdcg=; b=Mv3KT5l0CrwDB7YfXsf7x7C/1DWjbxgFg1v093fM+BnS4fPgINMH/oCQe30GMICfaX jLEtFWn/8DjF8mDDC3Pn8q1dlKhI6YdcYLiE3m+XKSlw4r8N/I/veS1Hk5eNRTv9ae76 8ipt5UrwIgnTyG8uOwFiFYYF56xQltFLWGYNo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=J+vTUWRSZsTyuZCf0w6fyQq5wgRfN9zDPPdK9SFmdcg=; b=Hj3sM961ntCQzsuMMCvu0Haq010pHapxSZCkvF3I7NgA2hEwwLXGSeDNOHmKLJp2HL +CNdFEtAxmoV1HAbAGdCqGd4xIlV9li+CmkhsApZRek5kPhTRbp+BhPM7illZ3wTwCIc 3e82t6GWSETLvrhqhCk8YxaKzwFAcpfFFQDd693vGDlDUMxgha4pUxJqhTKDGtCyzIRc DOVa8E/bnMscvcE3iVWPBUhj7jcowX1vxLzgROcvIgcz5VusmpEKc/ZAWTohCINa7Fvb APkiRtmyEoZmRSQ4SZoxwpm9AX74C4U8+gAw05yMX4IQmx2eBSXZIe1T6JojiXghHv1g A5Bw== X-Gm-Message-State: AElRT7E2pU21YsOfrdjYyqsfY6B9JP01TpqC4tTikRikWLEbAg8d5qd5 J4e57haP3gNPd5Sma9/f2LYo+VyS6Vk= X-Received: by 10.80.135.229 with SMTP id 34mr601763edz.227.1520942431495; Tue, 13 Mar 2018 05:00:31 -0700 (PDT) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id t23sm39130edb.54.2018.03.13.05.00.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Mar 2018 05:00:30 -0700 (PDT) From: Bryan O'Donoghue To: U-Boot@lists.denx.de Date: Tue, 13 Mar 2018 12:00:26 +0000 Message-Id: <1520942427-7366-2-git-send-email-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1520942427-7366-1-git-send-email-bryan.odonoghue@linaro.org> References: <1520942427-7366-1-git-send-email-bryan.odonoghue@linaro.org> Cc: fabio.estevam@nxp.com, rui.silva@linaro.org Subject: [U-Boot] [PATCH 1/2] warp7: usb: Introduce a get method for serial number X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We want to be able to set the USB device descriptor number iSerial number or indeed a disk-label unique identifier based on a chip-specific piece of data for the purposes of differentiating between WaRP7 boards via lsusb when connected to a host machine. In order to do this we want to have a serial number encoded in hardware, which will persist across bootloader, filesystem and config file changes. This patch utilises OCOTP_TESTER0 AND OCOTP_TESTER1 respectively for this purpose. OCOTP_TESTER is a unique identifier for each chip representing 31:0 OCOTP_TESTER0 (most significant) - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID OCOTP_TESTER1 (least significant) 31:24 - The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID 23:16 - The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID 15:11 - The wafer number of the wafer on which the device was fabricated/SJC CHALLENGE/ Unique ID 10:0 - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID The 64 bits of data generate a unique serial number per-chip. Signed-off-by: Bryan O'Donoghue Cc: Fabio Estevam Reviewed-by: Rui Miguel Silva Reviewed-by: Ryan Harkin --- board/warp7/warp7.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c index d422d63..2cec448 100644 --- a/board/warp7/warp7.c +++ b/board/warp7/warp7.c @@ -23,6 +23,7 @@ #include #include #include "../freescale/common/pfuze.h" +#include DECLARE_GLOBAL_DATA_PTR; @@ -90,6 +91,58 @@ static struct fsl_esdhc_cfg usdhc_cfg[1] = { {USDHC3_BASE_ADDR}, }; +/* + * OCOTP_TESTER + * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016 + * OCOTP_TESTER describes a unique ID based on silicon wafer + * and die X/Y position + * + * OCOTOP_TESTER offset 0x410 + * 31:0 fuse 0 + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID + * + * OCOTP_TESTER1 offset 0x420 + * 31:24 fuse 1 + * The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID + * 23:16 fuse 1 + * The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID + * 15:11 fuse 1 + * The wafer number of the wafer on which the device was fabricated/SJC + * CHALLENGE/ Unique ID + * 10:0 fuse 1 + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID + */ +#define WARP7_USB_SERIALID_BANK 0 +#define WARP7_USB_SERIALID_MSWORD 1 +#define WARP7_USB_SERIALID_LSWORD 2 + +static int warp7_get_serialid(u64 *id) +{ + u32 val; + int ret; + + if (!id) + return -EINVAL; + + /* Read first word */ + ret = fuse_read(WARP7_USB_SERIALID_BANK, WARP7_USB_SERIALID_MSWORD, &val); + if (ret) + goto done; + + *id = val; + *id <<= 32; + + /* Read second word */ + ret = fuse_read(WARP7_USB_SERIALID_BANK, WARP7_USB_SERIALID_LSWORD, &val); + if (ret) + goto done; + + *id |= val; + +done: + return ret; +} + int board_mmc_getcd(struct mmc *mmc) { /* Assume uSDHC3 emmc is always present */