[v2,2/3] imx: mx7: Add comment to describe OTP TESTER registers

Message ID 1520956098-25261-3-git-send-email-bryan.odonoghue@linaro.org
State Superseded
Headers show
Series
  • NXP WaARP7 set serial# from OTP fuses for USB iSerial
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Commit Message

Bryan O'Donoghue March 13, 2018, 3:48 p.m.
The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".

This patch documents the properties of the registers; in summary.

31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
  CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

The 64 bits of data generate a unique serial number per-chip.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/mach-imx/mx7/soc.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Fabio Estevam March 13, 2018, 3:53 p.m. | #1
On Tue, Mar 13, 2018 at 12:48 PM, Bryan O'Donoghue
<bryan.odonoghue@linaro.org> wrote:
> The tester registers provide a unique chip-level identifier which
> get_board_serial() returns in a "struct tag_serialnr".
>
> This patch documents the properties of the registers; in summary.
>
> 31:0 OCOTP_TESTER0 (most significant)
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
>
> OCOTP_TESTER1 (least significant)
> 31:24
> - The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 23:16
> - The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 15:11
> - The wafer number of the wafer on which the device was fabricated/SJC
>   CHALLENGE/ Unique ID
> 10:0
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
>
> The 64 bits of data generate a unique serial number per-chip.
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

Patch

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 1602585..fb92a26 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -202,6 +202,27 @@  int arch_misc_init(void)
 #endif
 
 #ifdef CONFIG_SERIAL_TAG
+/*
+ * OCOTP_TESTER
+ * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016
+ * OCOTP_TESTER describes a unique ID based on silicon wafer
+ * and die X/Y position
+ *
+ * OCOTOP_TESTER offset 0x410
+ * 31:0 fuse 0
+ * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
+ *
+ * OCOTP_TESTER1 offset 0x420
+ * 31:24 fuse 1
+ * The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
+ * 23:16 fuse 1
+ * The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
+ * 15:11 fuse 1
+ * The wafer number of the wafer on which the device was fabricated/SJC
+ * CHALLENGE/ Unique ID
+ * 10:0 fuse 1
+ * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
+ */
 void get_board_serial(struct tag_serialnr *serialnr)
 {
 	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;