site/risc-v: Cache more variables to build libIDL

Message ID 20180320030225.37857-1-raj.khem@gmail.com
State New
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Series
  • site/risc-v: Cache more variables to build libIDL
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Commit Message

Khem Raj March 20, 2018, 3:02 a.m.
These variables force runtime tests during configure
they are already cached for other architectures

Signed-off-by: Khem Raj <raj.khem@gmail.com>

---
 meta/site/riscv32-linux | 13 +++++++++++++
 meta/site/riscv64-linux |  8 ++++++++
 2 files changed, 21 insertions(+)

-- 
2.16.2

-- 
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Patch

diff --git a/meta/site/riscv32-linux b/meta/site/riscv32-linux
index 138aeb0a11..8a8a5fc1c4 100644
--- a/meta/site/riscv32-linux
+++ b/meta/site/riscv32-linux
@@ -1,6 +1,19 @@ 
+# general
+ac_cv_alignof_guint32=4
+ac_cv_alignof_guint64=8
+ac_cv_alignof_unsigned_long=4
+
 # glib-2.0
 glib_cv_stack_grows=${glib_cv_stack_grows=no}
 glib_cv_uscore=${glib_cv_uscore=no}
+glib_cv_sizeof_gmutex=${glib_cv_sizeof_gmutex=24}
+glib_cv_sizeof_intmax_t=${glib_cv_sizeof_intmax_t=8}
+glib_cv_sizeof_ptrdiff_t=${glib_cv_sizeof_ptrdiff_t=4}
+glib_cv_sizeof_size_t=${glib_cv_sizeof_size_t=4}
+glib_cv_sizeof_system_thread=${glib_cv_sizeof_system_thread=4}
+
+# libidl
+libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll}
 
 # startup-notification
 lf_cv_sane_realloc=${lf_cv_sane_realloc=yes}
diff --git a/meta/site/riscv64-linux b/meta/site/riscv64-linux
index 138aeb0a11..69ff137c9a 100644
--- a/meta/site/riscv64-linux
+++ b/meta/site/riscv64-linux
@@ -1,6 +1,14 @@ 
+# general
+ac_cv_alignof_guint32=4
+ac_cv_alignof_guint64=8
+ac_cv_alignof_unsigned_long=8
+
 # glib-2.0
 glib_cv_stack_grows=${glib_cv_stack_grows=no}
 glib_cv_uscore=${glib_cv_uscore=no}
 
+# libidl
+libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll}
+
 # startup-notification
 lf_cv_sane_realloc=${lf_cv_sane_realloc=yes}