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Mon, 19 Mar 2018 20:02:34 -0700 (PDT) Received: from localhost.localdomain ([2601:646:8880:466c:6245:cbff:fe64:591]) by smtp.gmail.com with ESMTPSA id z15sm738405pfh.11.2018.03.19.20.02.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Mar 2018 20:02:34 -0700 (PDT) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 19 Mar 2018 20:02:25 -0700 Message-Id: <20180320030225.37857-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.16.2 Subject: [OE-core] [PATCH] site/risc-v: Cache more variables to build libIDL X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org These variables force runtime tests during configure they are already cached for other architectures Signed-off-by: Khem Raj --- meta/site/riscv32-linux | 13 +++++++++++++ meta/site/riscv64-linux | 8 ++++++++ 2 files changed, 21 insertions(+) -- 2.16.2 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/site/riscv32-linux b/meta/site/riscv32-linux index 138aeb0a11..8a8a5fc1c4 100644 --- a/meta/site/riscv32-linux +++ b/meta/site/riscv32-linux @@ -1,6 +1,19 @@ +# general +ac_cv_alignof_guint32=4 +ac_cv_alignof_guint64=8 +ac_cv_alignof_unsigned_long=4 + # glib-2.0 glib_cv_stack_grows=${glib_cv_stack_grows=no} glib_cv_uscore=${glib_cv_uscore=no} +glib_cv_sizeof_gmutex=${glib_cv_sizeof_gmutex=24} +glib_cv_sizeof_intmax_t=${glib_cv_sizeof_intmax_t=8} +glib_cv_sizeof_ptrdiff_t=${glib_cv_sizeof_ptrdiff_t=4} +glib_cv_sizeof_size_t=${glib_cv_sizeof_size_t=4} +glib_cv_sizeof_system_thread=${glib_cv_sizeof_system_thread=4} + +# libidl +libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll} # startup-notification lf_cv_sane_realloc=${lf_cv_sane_realloc=yes} diff --git a/meta/site/riscv64-linux b/meta/site/riscv64-linux index 138aeb0a11..69ff137c9a 100644 --- a/meta/site/riscv64-linux +++ b/meta/site/riscv64-linux @@ -1,6 +1,14 @@ +# general +ac_cv_alignof_guint32=4 +ac_cv_alignof_guint64=8 +ac_cv_alignof_unsigned_long=8 + # glib-2.0 glib_cv_stack_grows=${glib_cv_stack_grows=no} glib_cv_uscore=${glib_cv_uscore=no} +# libidl +libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll} + # startup-notification lf_cv_sane_realloc=${lf_cv_sane_realloc=yes}