From patchwork Wed Mar 21 16:32:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 132232 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp2356309ljb; Wed, 21 Mar 2018 09:35:12 -0700 (PDT) X-Google-Smtp-Source: AG47ELuVGL3IDMmhwAQBAGwooQcIPP8jagIkB5prnsE61jetj8UEDD/fe7N9i5ZqZpzakZ0utO1w X-Received: by 10.107.27.15 with SMTP id b15mr21484378iob.202.1521650112469; Wed, 21 Mar 2018 09:35:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521650112; cv=none; d=google.com; s=arc-20160816; b=RAvkcuBSZlbPM8bvdZ1iWRqbDGpEgNVmv5/oA0O1IGkWwNqCpDBKSpc1Rv/0oz0GlZ YPvQF5/KPQkVIimrXKlJhd/2JpXue9ayOU0Ckmj2Dy7GA3fUl6kmURFmQEG6thCsaxdP rvzazrf1IFktnc90ZmRkHF9zKapD3gccuadATsBhDZeiF4hUcvPnHxSdTtjlWZXiGim5 VR082LJrT7D+9bvohC+U99toyPPHezBYwdrf6fxyDKuCPBByopYB+oVcRNS/eCQcdkia uOxKkih7v0QydurfueOaL6iB5TKuC1xE+xmG9IDsgKwhbv5ZFH4P4dy6kOELlXsLtwzX jA8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=PmoX2+QpvKbXgzgh+NbvyhbjgaaoCQ+3ssJcy8EmsWs=; b=EkofI+sC5MoDjD+EpF7MxM1ihvo2cWmPh0vl4v816SKIME3tY2NLszs0OaIwsAO0KM s2MuQdR0lo4e+PWb7LThR+5u6Ie5LE6LZTJJLehA7Gvxj0iI17e5KbEwc5733fSrUajj OCcFdu5tyAPdwsPQ8MrM7A1NB5Dx/bb4HiC21G9e3nUNrlAz1RJ9rjrOjHwC2V6OqHLA yusT8/KGM1LlF3x/MWRQsb/IognoPdxLVRBCVlQvDnYtGpaNnyxhJik+uDVb4CBw/JaT 5YBO3TuKPCg976Uo1WVT9Vrspf9hkGMHzhfuVlcXou0JvFQZIOHUYfTnYkKPYmRfWuDe Simw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RIxrWGzB; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l191-v6si2103604itl.125.2018.03.21.09.35.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 21 Mar 2018 09:35:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RIxrWGzB; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1eyggD-0003Os-6W; Wed, 21 Mar 2018 16:33:37 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1eygg5-00036V-Vv for xen-devel@lists.xenproject.org; Wed, 21 Mar 2018 16:33:30 +0000 X-Inumbo-ID: 8ccf5905-2d25-11e8-9728-bc764e045a96 Received: from mail-wm0-x243.google.com (unknown [2a00:1450:400c:c09::243]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 8ccf5905-2d25-11e8-9728-bc764e045a96; Wed, 21 Mar 2018 17:33:14 +0100 (CET) Received: by mail-wm0-x243.google.com with SMTP id l9so10912148wmh.2 for ; Wed, 21 Mar 2018 09:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GZ6V4WZ2QcrRKhUT2oKDygfab2I+d2yiFkYqSO8g/YI=; b=RIxrWGzBwCLwaUxBh61cCEsFm93cSf+7vA7VWxX4o+HQHjw0USmJZrYsA3Kwo3hiX5 4wTWG4Y89/Nyc/WmISG9U3Yh+uWTW9mMz3O9nN6DSrz5t7rJvIMJx+3kQltrz9+gtUD0 ogYwQc1+tMOCl3lBGChUoMZnT1PUKIMuCsPTw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GZ6V4WZ2QcrRKhUT2oKDygfab2I+d2yiFkYqSO8g/YI=; b=dIex79W2LEo1rtvG8a4hiI0Xp8JKWBoNjYwwe2pZykIOetn04p9/dP8wjCAnSv87dx n/W6f1DmtvOzVll237aPzPSLMJ5b23+iM3LnOv4MFlOMQvTYuVwAIKDl03za4DZGTP22 yhUvU38GizyKCv00yjIonEIj/8fmoOeGPL6YjCDCNHyJlIeFNQFxNhg8phrL+AvpCRSj vqdvWCTMfiyYZ5VHR5bQKIJHL4ncTpoLYzE/rBkNV0iT3qevZpCgWOdkSmsEaJgFT02n sax7Jn0J14Awuis7ksIiBxxV2GOcLZ384HtuvuM54O1xNhRuJWVvRsuHY+1sMEt7mGQs /3uQ== X-Gm-Message-State: AElRT7E2tJzL8zH2TmmlLgMnhKcGkIb3yDmQwAcE31ECqRqfa5QBNyjJ +o6OTChDwBvPcMqrI+EvfJQc5A== X-Received: by 10.28.178.136 with SMTP id b130mr3410594wmf.68.1521650007558; Wed, 21 Mar 2018 09:33:27 -0700 (PDT) Received: from e104803-lin.lan (mail.andrep.de. [217.160.17.100]) by smtp.gmail.com with ESMTPSA id n64sm4423724wmd.11.2018.03.21.09.33.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Mar 2018 09:33:27 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Wed, 21 Mar 2018 16:32:33 +0000 Message-Id: <20180321163235.12529-38-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180321163235.12529-1-andre.przywara@linaro.org> References: <20180321163235.12529-1-andre.przywara@linaro.org> Subject: [Xen-devel] [PATCH v3 37/39] ARM: new VGIC: vgic-init: implement map_resources X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: xen-devel@lists.xenproject.org, Andre Przywara MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" map_resources is the last initialization step needed before the first VCPU is run. At that stage the code stores the MMIO base addresses used. Also it registers the respective register frames with the MMIO framework. This is based on Linux commit cbae53e663ea, written by Eric Auger. Signed-off-by: Andre Przywara Acked-by: Julien Grall Acked-by: Stefano Stabellini --- xen/arch/arm/vgic/vgic-v2.c | 66 +++++++++++++++++++++++++++++++++++++++++++++ xen/arch/arm/vgic/vgic.h | 1 + 2 files changed, 67 insertions(+) diff --git a/xen/arch/arm/vgic/vgic-v2.c b/xen/arch/arm/vgic/vgic-v2.c index ce77e58857..5516a8534f 100644 --- a/xen/arch/arm/vgic/vgic-v2.c +++ b/xen/arch/arm/vgic/vgic-v2.c @@ -235,6 +235,72 @@ void vgic_v2_enable(struct vcpu *vcpu) gic_hw_ops->update_hcr_status(GICH_HCR_EN, true); } +int vgic_v2_map_resources(struct domain *d) +{ + struct vgic_dist *dist = &d->arch.vgic; + paddr_t cbase, csize; + paddr_t vbase; + int ret; + + /* + * The hardware domain gets the hardware address. + * Guests get the virtual platform layout. + */ + if ( is_hardware_domain(d) ) + { + d->arch.vgic.vgic_dist_base = gic_v2_hw_data.dbase; + /* + * For the hardware domain, we always map the whole HW CPU + * interface region in order to match the device tree (the "reg" + * properties is copied as it is). + * Note that we assume the size of the CPU interface is always + * aligned to PAGE_SIZE. + */ + cbase = gic_v2_hw_data.cbase; /* was: dist->vgic_cpu_base */ + csize = gic_v2_hw_data.csize; + vbase = gic_v2_hw_data.vbase; /* was: kvm_vgic_global_state.vcpu_base */ + } + else + { + d->arch.vgic.vgic_dist_base = GUEST_GICD_BASE; + /* + * The CPU interface exposed to the guest is always 8kB. We may + * need to add an offset to the virtual CPU interface base + * address when in the GIC is aliased to get a 8kB contiguous + * region. + */ + BUILD_BUG_ON(GUEST_GICC_SIZE != SZ_8K); + cbase = GUEST_GICC_BASE; + csize = GUEST_GICC_SIZE; + vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; + } + + + ret = vgic_register_dist_iodev(d, gaddr_to_gfn(dist->vgic_dist_base), + VGIC_V2); + if ( ret ) + { + gdprintk(XENLOG_ERR, "Unable to register VGIC MMIO regions\n"); + return ret; + } + + /* + * Map the gic virtual cpu interface in the gic cpu interface + * region of the guest. + */ + ret = map_mmio_regions(d, gaddr_to_gfn(cbase), csize / PAGE_SIZE, + maddr_to_mfn(vbase)); + if ( ret ) + { + gdprintk(XENLOG_ERR, "Unable to remap VGIC CPU to VCPU\n"); + return ret; + } + + dist->ready = true; + + return 0; +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vgic/vgic.h b/xen/arch/arm/vgic/vgic.h index 112952fbf9..e8e407adbe 100644 --- a/xen/arch/arm/vgic/vgic.h +++ b/xen/arch/arm/vgic/vgic.h @@ -67,6 +67,7 @@ void vgic_v2_fold_lr_state(struct vcpu *vcpu); void vgic_v2_populate_lr(struct vcpu *vcpu, struct vgic_irq *irq, int lr); void vgic_v2_set_underflow(struct vcpu *vcpu); void vgic_v2_enable(struct vcpu *vcpu); +int vgic_v2_map_resources(struct domain *d); int vgic_register_dist_iodev(struct domain *d, gfn_t dist_base_fn, enum vgic_type);