qemu: fix qemuarm64 intermediate kernel hang in raid6_select_algo func

Message ID 1522042927-29046-1-git-send-email-kamensky@cisco.com
State Accepted
Commit aa33945fc7cf7bfa859c4091bcfa2695c422849b
Headers show
Series
  • qemu: fix qemuarm64 intermediate kernel hang in raid6_select_algo func
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Commit Message

Victor Kamensky March 26, 2018, 5:42 a.m.
Backport fix from qemu mainline for intermediate qemuarm64 hang
issue. Root caused in OE environment, issue with aarch64 qemu
logic of executing instructions that reenabe interrupts. See patch
commit message for more details.

Upstream-Status: Backport
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
---
 ...te-a64-treat-DISAS_UPDATE-as-variant-of-D.patch | 67 ++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch

Comments

Ross Burton March 26, 2018, 10:31 a.m. | #1
An early winner of Patch of the Day in my books.

Thanks Victor!

Ross

On 26 March 2018 at 06:42, Victor Kamensky <kamensky@cisco.com> wrote:
> Backport fix from qemu mainline for intermediate qemuarm64 hang
> issue. Root caused in OE environment, issue with aarch64 qemu
> logic of executing instructions that reenabe interrupts. See patch
> commit message for more details.
>
> Upstream-Status: Backport
> Signed-off-by: Victor Kamensky <kamensky@cisco.com>
> ---
>  ...te-a64-treat-DISAS_UPDATE-as-variant-of-D.patch | 67 ++++++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch
>
> diff --git a/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch b/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch
> new file mode 100644
> index 0000000..f90cae6
> --- /dev/null
> +++ b/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch
> @@ -0,0 +1,67 @@
> +From a75a52d62418dafe462be4fe30485501d1010bb9 Mon Sep 17 00:00:00 2001
> +From: Victor Kamensky <kamensky@cisco.com>
> +Date: Fri, 23 Mar 2018 18:26:45 +0000
> +Subject: [PATCH] arm/translate-a64: treat DISAS_UPDATE as variant of
> + DISAS_EXIT
> +MIME-Version: 1.0
> +Content-Type: text/plain; charset=UTF-8
> +Content-Transfer-Encoding: 8bit
> +
> +In OE project 4.15 linux kernel boot hang was observed under
> +single cpu aarch64 qemu. Kernel code was in a loop waiting for
> +vtimer arrival, spinning in TC generated blocks, while interrupt
> +was pending unprocessed. This happened because when qemu tried to
> +handle vtimer interrupt target had interrupts disabled, as
> +result flag indicating TCG exit, cpu->icount_decr.u16.high,
> +was cleared but arm_cpu_exec_interrupt function did not call
> +arm_cpu_do_interrupt to process interrupt. Later when target
> +reenabled interrupts, it happened without exit into main loop, so
> +following code that waited for result of interrupt execution
> +run in infinite loop.
> +
> +To solve the problem instructions that operate on CPU sys state
> +(i.e enable/disable interrupt), and marked as DISAS_UPDATE,
> +should be considered as DISAS_EXIT variant, and should be
> +forced to exit back to main loop so qemu will have a chance
> +processing pending CPU state updates, including pending
> +interrupts.
> +
> +This change brings consistency with how DISAS_UPDATE is treated
> +in aarch32 case.
> +
> +CC: Peter Maydell <peter.maydell@linaro.org>
> +CC: Alex Bennée <alex.bennee@linaro.org>
> +CC: qemu-stable@nongnu.org
> +Suggested-by: Peter Maydell <peter.maydell@linaro.org>
> +Signed-off-by: Victor Kamensky <kamensky@cisco.com>
> +Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> +Message-id: 1521526368-1996-1-git-send-email-kamensky@cisco.com
> +Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> +Upstream-Status: Backport
> +---
> + target/arm/translate-a64.c | 6 +++---
> + 1 file changed, 3 insertions(+), 3 deletions(-)
> +
> +diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> +index 31ff047..327513e 100644
> +--- a/target/arm/translate-a64.c
> ++++ b/target/arm/translate-a64.c
> +@@ -13378,12 +13378,12 @@ static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
> +         case DISAS_UPDATE:
> +             gen_a64_set_pc_im(dc->pc);
> +             /* fall through */
> +-        case DISAS_JUMP:
> +-            tcg_gen_lookup_and_goto_ptr();
> +-            break;
> +         case DISAS_EXIT:
> +             tcg_gen_exit_tb(0);
> +             break;
> ++        case DISAS_JUMP:
> ++            tcg_gen_lookup_and_goto_ptr();
> ++            break;
> +         case DISAS_NORETURN:
> +         case DISAS_SWI:
> +             break;
> +--
> +2.7.4
> +
> --
> 2.7.4
>
> --
> _______________________________________________
> Openembedded-core mailing list
> Openembedded-core@lists.openembedded.org
> http://lists.openembedded.org/mailman/listinfo/openembedded-core
Richard Purdie March 26, 2018, 1:36 p.m. | #2
On Mon, 2018-03-26 at 11:31 +0100, Burton, Ross wrote:
> An early winner of Patch of the Day in my books.


Indeed, getting this one fixed is great as it has been messing up a lot
of builds, thanks!

Cheers,

Richard
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Victor Kamensky March 28, 2018, 3:46 p.m. | #3
On Mon, 26 Mar 2018, Richard Purdie wrote:

> On Mon, 2018-03-26 at 11:31 +0100, Burton, Ross wrote:

>> An early winner of Patch of the Day in my books.

>

> Indeed, getting this one fixed is great as it has been messing up a lot

> of builds, thanks!


Thank you guys.

FYI and it is a quite emabarissing: I forgot to do "git add" for .bb
file to update SRC_URI with the patch that I tested. So now it is
really has no effect :(. I will send catch up patch with SRC_URI
update (one that I really tested) as soon as I finish retesting it
on top of latest tree. Sorry about that. I just noticed that while I
reviewed lastest today pulled tree.

Thanks,
Victor

> Cheers,

>

> Richard

>

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Ross Burton March 28, 2018, 3:58 p.m. | #4
Not as embarrassing as the people who reviewed the patch and didn't notice that!

Ahem.

Ross

On 28 March 2018 at 16:46, Victor Kamensky <kamensky@cisco.com> wrote:
>

>

> On Mon, 26 Mar 2018, Richard Purdie wrote:

>

>> On Mon, 2018-03-26 at 11:31 +0100, Burton, Ross wrote:

>>>

>>> An early winner of Patch of the Day in my books.

>>

>>

>> Indeed, getting this one fixed is great as it has been messing up a lot

>> of builds, thanks!

>

>

> Thank you guys.

>

> FYI and it is a quite emabarissing: I forgot to do "git add" for .bb

> file to update SRC_URI with the patch that I tested. So now it is

> really has no effect :(. I will send catch up patch with SRC_URI

> update (one that I really tested) as soon as I finish retesting it

> on top of latest tree. Sorry about that. I just noticed that while I

> reviewed lastest today pulled tree.

>

> Thanks,

> Victor

>

>> Cheers,

>>

>> Richard

>>

>

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Patch

diff --git a/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch b/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch
new file mode 100644
index 0000000..f90cae6
--- /dev/null
+++ b/meta/recipes-devtools/qemu/qemu/0001-arm-translate-a64-treat-DISAS_UPDATE-as-variant-of-D.patch
@@ -0,0 +1,67 @@ 
+From a75a52d62418dafe462be4fe30485501d1010bb9 Mon Sep 17 00:00:00 2001
+From: Victor Kamensky <kamensky@cisco.com>
+Date: Fri, 23 Mar 2018 18:26:45 +0000
+Subject: [PATCH] arm/translate-a64: treat DISAS_UPDATE as variant of
+ DISAS_EXIT
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In OE project 4.15 linux kernel boot hang was observed under
+single cpu aarch64 qemu. Kernel code was in a loop waiting for
+vtimer arrival, spinning in TC generated blocks, while interrupt
+was pending unprocessed. This happened because when qemu tried to
+handle vtimer interrupt target had interrupts disabled, as
+result flag indicating TCG exit, cpu->icount_decr.u16.high,
+was cleared but arm_cpu_exec_interrupt function did not call
+arm_cpu_do_interrupt to process interrupt. Later when target
+reenabled interrupts, it happened without exit into main loop, so
+following code that waited for result of interrupt execution
+run in infinite loop.
+
+To solve the problem instructions that operate on CPU sys state
+(i.e enable/disable interrupt), and marked as DISAS_UPDATE,
+should be considered as DISAS_EXIT variant, and should be
+forced to exit back to main loop so qemu will have a chance
+processing pending CPU state updates, including pending
+interrupts.
+
+This change brings consistency with how DISAS_UPDATE is treated
+in aarch32 case.
+
+CC: Peter Maydell <peter.maydell@linaro.org>
+CC: Alex Bennée <alex.bennee@linaro.org>
+CC: qemu-stable@nongnu.org
+Suggested-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Victor Kamensky <kamensky@cisco.com>
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Message-id: 1521526368-1996-1-git-send-email-kamensky@cisco.com
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Upstream-Status: Backport
+---
+ target/arm/translate-a64.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
+index 31ff047..327513e 100644
+--- a/target/arm/translate-a64.c
++++ b/target/arm/translate-a64.c
+@@ -13378,12 +13378,12 @@ static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
+         case DISAS_UPDATE:
+             gen_a64_set_pc_im(dc->pc);
+             /* fall through */
+-        case DISAS_JUMP:
+-            tcg_gen_lookup_and_goto_ptr();
+-            break;
+         case DISAS_EXIT:
+             tcg_gen_exit_tb(0);
+             break;
++        case DISAS_JUMP:
++            tcg_gen_lookup_and_goto_ptr();
++            break;
+         case DISAS_NORETURN:
+         case DISAS_SWI:
+             break;
+-- 
+2.7.4
+