From patchwork Thu Apr 12 11:10:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 133197 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp1571052ljb; Thu, 12 Apr 2018 04:11:57 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/kAnuz1y5uezx+LZ4pkPqKky8tUhzAG5y27gEP/dhrWFMC5DgPRUbL307z2bYJQ9E9KUoe X-Received: by 2002:a17:902:20ca:: with SMTP id v10-v6mr545874plg.9.1523531517686; Thu, 12 Apr 2018 04:11:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523531517; cv=none; d=google.com; s=arc-20160816; b=roNzjsybLtQs0KT6QglGR4/K9SUTMWg7aqdRu99g1+2D7r2UgMS2jWlD5TxhcI1+t8 mHL8nHSEmNBvnZUOY7i548S13ZIIqbVuY82roYrQCdOcccttR5Za8LKlJPVTMamWMyo8 CnnBR8NPu1IiOj/OXlf5mPuYrTMnP/L33guaCd4eA0qtoMAO12Ek4pII6CQucrNp6Rr/ YAAS8uwEtm01z+I7a/3BwCksOpRZJ/CbkoM/hYoS7SnG5V3cwasMMW1W84R60UGPoqMl +UyQ6f8s8YcXRtbQ6vOtJU3jQqRAPskZryU90dy2GgC02p1/dChV4zFJ8rIz+twoIHHx 4pBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=AW7Zj+hn8t5QEnXLb881dMKoj6SNZ6Ypv61x5M1vrxk=; b=uQsVglQM6ep0eGsVzrcG4QMcxxi4Yx4+XMJm4FJ4NCVqTga+3b4nFzpHPoGy2kZAlj lhPASvArxyj4BzAeMXAAZAtUT4VrPjoWkD2EsjXcpJiS+EVuqAqXTtiAOmhGAdzW1tBy aX+71KjLXziXZHCpKPLc2P5rV9mn54cPh4zjtxF0x6PvYF/bf4Pdi/nBse6fWXZRr0pE SiafTUx6kAmOgx5Yc5uUdIEeNqVEPdeHXpVOD+gZr1J9ZWglgN6eElJqS/7RK8cC0rBg oUyyyzSpm8+b1pM71ADQngx1cS3v2y/XMV0BMl8HPqU/zOd+KK/DJYB30gCnfxpzeZmF lavg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bg3-v6si3001807plb.118.2018.04.12.04.11.57; Thu, 12 Apr 2018 04:11:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752586AbeDLLL4 (ORCPT + 11 others); Thu, 12 Apr 2018 07:11:56 -0400 Received: from foss.arm.com ([217.140.101.70]:59304 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752428AbeDLLL4 (ORCPT ); Thu, 12 Apr 2018 07:11:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 487E580D; Thu, 12 Apr 2018 04:11:56 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A203A3F24A; Thu, 12 Apr 2018 04:11:54 -0700 (PDT) From: Mark Rutland To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Subject: [PATCH v4.9.y 02/42] arm64: Implement array_index_mask_nospec() Date: Thu, 12 Apr 2018 12:10:58 +0100 Message-Id: <20180412111138.40990-3-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180412111138.40990-1-mark.rutland@arm.com> References: <20180412111138.40990-1-mark.rutland@arm.com> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Robin Murphy commit 022620eed3d0bc4bf2027326f599f5ad71c2ea3f upstream. Provide an optimised, assembly implementation of array_index_mask_nospec() for arm64 so that the compiler is not in a position to transform the code in ways which affect its ability to inhibit speculation (e.g. by introducing conditional branches). This is similar to the sequence used by x86, modulo architectural differences in the carry/borrow flags. Reviewed-by: Mark Rutland Signed-off-by: Robin Murphy Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] --- arch/arm64/include/asm/barrier.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) -- 2.11.0 diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index c68fdc5707ed..0b0755c961ac 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -40,6 +40,27 @@ #define dma_rmb() dmb(oshld) #define dma_wmb() dmb(oshst) +/* + * Generate a mask for array_index__nospec() that is ~0UL when 0 <= idx < sz + * and 0 otherwise. + */ +#define array_index_mask_nospec array_index_mask_nospec +static inline unsigned long array_index_mask_nospec(unsigned long idx, + unsigned long sz) +{ + unsigned long mask; + + asm volatile( + " cmp %1, %2\n" + " sbc %0, xzr, xzr\n" + : "=r" (mask) + : "r" (idx), "Ir" (sz) + : "cc"); + + csdb(); + return mask; +} + #define __smp_mb() dmb(ish) #define __smp_rmb() dmb(ishld) #define __smp_wmb() dmb(ishst)