From patchwork Thu Apr 12 11:11:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 133221 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp1572186ljb; Thu, 12 Apr 2018 04:13:15 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+It5nvqux8SWcZFjyLuGHpe/MSJy4M+9QBO5PtSQ1coUw5hDbNbqHLKPJm65dCPUMRBAuB X-Received: by 2002:a17:902:2d01:: with SMTP id o1-v6mr511659plb.309.1523531595368; Thu, 12 Apr 2018 04:13:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523531595; cv=none; d=google.com; s=arc-20160816; b=HXe/b2W3krusC1ug7L3o9g260F5xUyh0poFXtdx6PMZLoXb59UMLwahxDIKo1+l5Ge wQ7Om57bq9d93vAokqAFlNWOPRKPTk58B6jdC/5icvKsfgIoFSJJcFk61LzZz+lY6k3M 9D3JPGwDq59EaKu317ZesfXFNODQhBukllHnyIXT1h77L7/iXSL/VAc0fWZn7iCgKoXw Zvl0JFs5pH+WFy2OUq9uBfVAlGz6K+PB4RIUuumgzGlDMjHcXnvfl1v7/uoOLNkbumI3 FNJX7wCmQE/T5AOmDSNKD7Gr8wjMV3Nq1Emb2kQhCl1pV7W7RQhvcmGL01XMbrp4/TeD 0Xiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=4UdGPywgjJKHWNDqZWl5iVEX41UgiMBVAEYKTBbxgtc=; b=jt7kh85eqqly6X6ZMu0g4HsHgY5nef4Vk0uyJZ3L/U/Ykqw8BwnjxQ4KHk4ywVuHcb MC+Z4UXrFR0MnwTy8PO2sQyMbK2qH2acyEODxLBeTA7EcwUF3OS4GEXS0rJ0k4cL1AO+ ZYMf51qoHVKlYHgu438p1KVvDtiF/3JY3QNsrhhIWuBZGb8sllIxK7R378LGQdkFq9H/ +TKuXE01dEivAQJW9XbB0OwBtK/PEPobLKLLw1JwmvBiOO4o2Kdm55PbE3Z81E/QUv2O r6jYkj4bVZyRHpOUU4292INYiwkDUwQanqcMq9tInjwMmcvgF2+cWcUHDjOFlrhmFQkV cW1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bg3-v6si3001807plb.118.2018.04.12.04.13.15; Thu, 12 Apr 2018 04:13:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752829AbeDLLNO (ORCPT + 11 others); Thu, 12 Apr 2018 07:13:14 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59544 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752125AbeDLLNO (ORCPT ); Thu, 12 Apr 2018 07:13:14 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0424880D; Thu, 12 Apr 2018 04:13:14 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4F2E43F24A; Thu, 12 Apr 2018 04:13:12 -0700 (PDT) From: Mark Rutland To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Subject: [PATCH v4.9.y 26/42] arm64: Branch predictor hardening for Cavium ThunderX2 Date: Thu, 12 Apr 2018 12:11:22 +0100 Message-Id: <20180412111138.40990-27-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180412111138.40990-1-mark.rutland@arm.com> References: <20180412111138.40990-1-mark.rutland@arm.com> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jayachandran C commit f3d795d9b360523beca6d13ba64c2c532f601149 upstream. Use PSCI based mitigation for speculative execution attacks targeting the branch predictor. We use the same mechanism as the one used for Cortex-A CPUs, we expect the PSCI version call to have a side effect of clearing the BTBs. Acked-by: Will Deacon Signed-off-by: Jayachandran C Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] --- arch/arm64/kernel/cpu_errata.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.11.0 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 5550d18b8180..67cdfc6a458e 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -252,6 +252,16 @@ const struct arm64_cpu_capabilities arm64_errata[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), .enable = enable_psci_bp_hardening, }, + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), + .enable = enable_psci_bp_hardening, + }, + { + .capability = ARM64_HARDEN_BRANCH_PREDICTOR, + MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), + .enable = enable_psci_bp_hardening, + }, #endif { }