From patchwork Mon Dec 3 10:40:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 13327 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0954923E1A for ; Mon, 3 Dec 2012 10:34:15 +0000 (UTC) Received: from mail-ia0-f182.google.com (mail-ia0-f182.google.com [209.85.210.182]) by fiordland.canonical.com (Postfix) with ESMTP id 95CBBA19D65 for ; Mon, 3 Dec 2012 10:34:14 +0000 (UTC) Received: by mail-ia0-f182.google.com with SMTP id x2so3151732iad.27 for ; Mon, 03 Dec 2012 02:34:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :dlp-filter:x-mtr:x-brightmail-tracker:x-brightmail-tracker :x-cfilter-loop:x-gm-message-state; bh=Qvtc33sqb9dIEy1gP8RI602DQ8m0H6Nr+PqfXChuyIM=; b=CWVD44KK/p3VIKvdr5QPtmEWpio+KWoqFbdXuhFUnVB8/gRK93tV85MEDGq4a8O1vy Jsa/3IN8BsA2O9u1wNf7GoPp1gC8215r03MqAzPuUDoyTbyQVEsD/xWQ0Sl40Hky/0Wk z8HDdT+OyhJnlPuBdS9flBrpvMbq/3cf/0z4EEORAPOk2Xif5yMUclrp9Zar0dZewqyy CUurgOeMpI1xj+JwOkl3D2opiQfMxYjWGpsKlPbXWozIHp+xwbM2N+tyjiAQ4IDTx3Yq YxYTg/et3ZnL1FvvqrcxMS/BRhGSDtef1GqrF4Oa3kF4ItWNiVtMAAiNrkLk69ZNY0uJ yeCw== Received: by 10.50.213.69 with SMTP id nq5mr5526741igc.70.1354530853963; Mon, 03 Dec 2012 02:34:13 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp121396igt; Mon, 3 Dec 2012 02:34:13 -0800 (PST) Received: by 10.69.16.100 with SMTP id fv4mr27643394pbd.135.1354530853318; Mon, 03 Dec 2012 02:34:13 -0800 (PST) Received: from mailout3.samsung.com (mailout3.samsung.com. [203.254.224.33]) by mx.google.com with ESMTP id wu8si18720844pbc.93.2012.12.03.02.34.12; Mon, 03 Dec 2012 02:34:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEG004RVAO1Q620@mailout3.samsung.com>; Mon, 03 Dec 2012 19:34:12 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id EA.10.12699.4208CB05; Mon, 03 Dec 2012 19:34:12 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-77-50bc8024f51b Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 9A.10.12699.4208CB05; Mon, 03 Dec 2012 19:34:12 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MEG007ZFAOH6U90@mmp2.samsung.com>; Mon, 03 Dec 2012 19:34:12 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 4/4] SPI: EXYNOS: Add FDT support to driver. Date: Mon, 03 Dec 2012 16:10:03 +0530 Message-id: <1354531203-29789-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1354531203-29789-1-git-send-email-rajeshwari.s@samsung.com> References: <1354531203-29789-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRmVeSWpSXmKPExsWyRsSkRlelYU+AwcTvIhYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyZv6bwVywVali48xWtgbGf1JdjJwcEgImEguPHmaE sMUkLtxbz9bFyMUhJLCUUWLDz3nsMEUP709jhEhMZ5Q4e+MKM4QzkUli//1OZpAqNgEjia0n p4GNEhGQkPjVfxXMZhaIkXi9/wcbiC0sYCOx4FIfWJxFQFXi6MEbYDavgIfEwTkXWSG2KUgc m/oVzOYU8JT4trIRrFcIqKahbSITRK+AxLfJh1i6GDmA6mUlNh0Au0dC4DqbxLP9f6DekZQ4 uOIGywRG4QWMDKsYRVMLkguKk9JzjfSKE3OLS/PS9ZLzczcxAgPy9L9n0jsYVzVYHGIU4GBU 4uF9+GV3gBBrYllxZe4hRgkOZiUR3ijrPQFCvCmJlVWpRfnxRaU5qcWHGH2ALpnILCWanA+M lrySeENjE3NTY1NLIyMzU1McwkrivM0eKQFCAumJJanZqakFqUUw45g4OKUaGDUWMEj/vLfF egWfyrqsp2d2r9+flvLISGTBW/5XnlH1isrZfeUcXdOkPXSklj485/h+4WV2PuFUuR95j6on bBX7KKf5Kd3w5IfzfQla+6wXKZsn+vi82+3yeU9tl/mCK0uY1j+OMyip2xItW95cJqHP85Uh k0Hz8rb/Fpcu+R5xFjnQfH7rUyWW4oxEQy3mouJEAHpASKZ1AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIIsWRmVeSWpSXmKPExsVy+t9jQV2Vhj0BBsu3cFg8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzJj5bwZzwVal io0zW9kaGP9JdTFyckgImEg8vD+NEcIWk7hwbz1bFyMXh5DAdEaJszeuMEM4E5kk9t/vZAap YhMwkth6EqJDREBC4lf/VTCbWSBG4vX+H2wgtrCAjcSCS31gcRYBVYmjB2+A2bwCHhIH51xk hdimIHFs6lcwm1PAU+LbykawXiGgmoa2iUwTGHkXMDKsYhRNLUguKE5KzzXSK07MLS7NS9dL zs/dxAgO92fSOxhXNVgcYhTgYFTi4X34ZXeAEGtiWXFl7iFGCQ5mJRHeKOs9AUK8KYmVValF +fFFpTmpxYcYfYCumsgsJZqcD4zFvJJ4Q2MTc1NjU0sTCxMzSxzCSuK8zR4pAUIC6Yklqdmp qQWpRTDjmDg4pRoYy+1+/GmqSQiQzfpRmLPph3ayXnTLsWr9/Ip7lo0Pcxxu8WcofM68EHX7 dO7Baexm0jYb0jPmPcv9lreTtb00bOWXJwzfFXcfOpVVmjp7a4V4saeo5H72Np2d6zjcmNSc 9p792WItGRAwccc1LxNhW7E5/lnBNg1756nbnbG1WL6H68U5124lluKMREMt5qLiRAC4KPIK pAIAAA== X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmDWT1oR6ulq7FutgDUD6zp25AOLg6txwCd6yIumggoELzvhoEj+ZNqjjbREm5xZTmM69mk This patch adds FDT support to the SPI driver. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde --- drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 3e6c18f..7ecc566 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -28,16 +29,20 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Information about each SPI controller */ struct spi_bus { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ + int node; }; /* A list of spi buses that we know about */ static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; +static unsigned int bus_count; struct exynos_spi_slave { struct spi_slave slave; @@ -50,7 +55,7 @@ struct exynos_spi_slave { static struct spi_bus *spi_get_bus(unsigned dev_index) { - if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS) + if (dev_index < bus_count) return &spi_bus[dev_index]; debug("%s: invalid bus %d", __func__, dev_index); @@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index) (dev_index - 3); } +/* + * Read the SPI config from the device tree node. + * + * @param blob FDT blob to read from + * @param node Node offset to read from + * @param bus SPI bus structure to fill with information + * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing + */ +static int spi_get_config(const void *blob, int node, struct spi_bus *bus) +{ + bus->node = node; + bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + bus->periph_id = pinmux_decode_periph_id(blob, node); + if (bus->periph_id == PERIPH_ID_NONE) { + debug("%s: Invalid peripheral ID %d\n", __func__, + bus->periph_id); + return -FDT_ERR_NOTFOUND; + } + + /* Use 500KHz as a suitable default */ + bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + + return 0; +} + + +/* + * Process a list of nodes, adding them to our list of SPI ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + int i; + + /* build the i2c_controllers[] for each controller */ + for (i = 0; i < count; i++) { + int node = node_list[i]; + struct spi_bus *bus; + + if (node <= 0) + continue; + + bus = &spi_bus[i]; + if (spi_get_config(blob, node, bus)) { + printf("exynos spi_init: failed to decode bus %d\n", + i); + return -1; + } + + debug("spi: controller bus %d at %p, periph_id %d\n", + i, bus->regs, bus->periph_id); + bus->inited = 1; + bus_count++; + } + + return 0; +} + /* Sadly there is no error return from this function */ void spi_init(void) { - int i; + int count; + +#ifdef CONFIG_OF_CONTROL + int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; + const void *blob = gd->fdt_blob; + + count = fdtdec_find_aliases_for_id(blob, "spi", + COMPAT_SAMSUNG_EXYNOS_SPI, node_list, + EXYNOS5_SPI_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count)) + return; + +#else struct spi_bus *bus; - for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { - bus = &spi_bus[i]; - bus->regs = get_spi_base(i); - bus->periph_id = PERIPH_ID_SPI0 + i; + for (count = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { + bus = &spi_bus[count]; + bus->regs = get_spi_base(count); + bus->periph_id = PERIPH_ID_SPI0 + count; /* Although Exynos5 supports upto 50Mhz speed, * we are setting it to 10Mhz for safe side */ bus->frequency = 10000000; bus->inited = 1; + bus->node = 0; + bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; } +#endif }