From patchwork Wed Dec 5 10:38:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 13369 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4BC6F23E2C for ; Wed, 5 Dec 2012 10:33:13 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id DF385A189D2 for ; Wed, 5 Dec 2012 10:33:12 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id t4so3654041iag.11 for ; Wed, 05 Dec 2012 02:33:12 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :dlp-filter:x-mtr:x-brightmail-tracker:x-brightmail-tracker :x-cfilter-loop:x-gm-message-state; bh=PePdZNGjpc+x4fYqUM/YScoA/IOTMb0OktEoWCrZ7yE=; b=FiTS8/OZyWc1AkDt+pOTRDXZf+lH6c1OCk4yIVMMzGFOrulSMCCY04h/wbaUmMABy/ owXtcO6brfLqfGIxYwxbJ9it87hlN8/f0izFzEREKPHwuwSu4iZK9Ytcyw8sU6kdl14k 37UYedpxqp3M2uvEqsFWCsrByOba5icsPVj4B1XxxK1ACK5/NbaCFjgNC5acOpXTEZVA MSW5SfW1duM8bJmWOKLaHTa9+J4P5HUGX8KzJ/RoZN6gz6TI7K2nA1bAKOaTQGHddNhH hCftaHP6tx1GKeWp/G1isdDLh6s1Q6kxanOGspgGzifSwadahgigKhhQ4DvlzxwKcCWu ixlg== Received: by 10.50.173.34 with SMTP id bh2mr1261096igc.70.1354703592615; Wed, 05 Dec 2012 02:33:12 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp329551igt; Wed, 5 Dec 2012 02:33:12 -0800 (PST) Received: by 10.68.239.104 with SMTP id vr8mr47763162pbc.59.1354703591842; Wed, 05 Dec 2012 02:33:11 -0800 (PST) Received: from mailout4.samsung.com (mailout4.samsung.com. [203.254.224.34]) by mx.google.com with ESMTP id y1si5965024pav.74.2012.12.05.02.33.10; Wed, 05 Dec 2012 02:33:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.34 as permitted sender) client-ip=203.254.224.34; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.34 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEJ00MO2ZY7I7X0@mailout4.samsung.com>; Wed, 05 Dec 2012 19:33:10 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 76.54.01231.5E22FB05; Wed, 05 Dec 2012 19:33:09 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-cc-50bf22e55581 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 06.54.01231.5E22FB05; Wed, 05 Dec 2012 19:33:09 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MEJ0057HZYM3V80@mmp1.samsung.com>; Wed, 05 Dec 2012 19:33:09 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 4/4 V2] SPI: EXYNOS: Add FDT support to driver. Date: Wed, 05 Dec 2012 16:08:47 +0530 Message-id: <1354703927-4786-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1354703927-4786-1-git-send-email-rajeshwari.s@samsung.com> References: <1354703927-4786-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkRvep0v4Ag13rrS0err/JYjHl8BcW ByaPO9f2sAUwRnHZpKTmZJalFunbJXBlfH76hrHgvFLF+vVvmBoYJ0h3MXJySAiYSGxdOZkN whaTuHBvPZDNxSEksJRR4vK63SwwRY8+trJCJBYxShyZcgOqaiKTRMusJ+wgVWwCRhJbT05j BLFFBCQkfvVfBbOZBWIkXu//AbZCWMBe4mDrD2YQm0VAVeLxiulMXYwcHLwC7hJfr8tCLFOQ ODb1KytImFPAQ2LjcxmQsBBQxclP66A6BSS+TT7EAlIiISArsekAM8g1EgL32SRufL/HDjFG UuLgihssExiFFzAyrGIUTS1ILihOSs811CtOzC0uzUvXS87P3cQIDMbT/55J7WBc2WBxiFGA g1GJhzdLb1+AEGtiWXFl7iFGCQ5mJRHeeTL7A4R4UxIrq1KL8uOLSnNSiw8x+gBdMpFZSjQ5 HxgpeSXxhsYm5qbGppZGRmampjiElcR5mz1SAoQE0hNLUrNTUwtSi2DGMXFwSjUwOjNqmnx/ Hy9fUcRoXeFa/09YQkr/6untMZeaDYMeqdZ8MLG7KCP97ffy57/exZV5BnH3qCp1Ocx7vn7t AovlR6++s1Sfu2XvtaU3J+dbLElJZQgp8gjhio+57xh9W+XNEc9UBUZ9xSO1p74Zaj7MeT3N 7tvJdSvaJtWfDuZcGiOwWeqUS1WEEktxRqKhFnNRcSIA6TorgnMCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42I5/e+xgO5Tpf0BBs8+61k8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzPj89A1jwXml ivXr3zA1ME6Q7mLk5JAQMJF49LGVFcIWk7hwbz1bFyMXh5DAIkaJI1NuQDkTmSRaZj1hB6li EzCS2HpyGiOILSIgIfGr/yqYzSwQI/F6/w82EFtYwF7iYOsPZhCbRUBV4vGK6UxdjBwcvALu El+vy0IsU5A4NvUrK0iYU8BDYuNzGZCwEFDFyU/rmCcw8i5gZFjFKJpakFxQnJSea6hXnJhb XJqXrpecn7uJERzqz6R2MK5ssDjEKMDBqMTDm6W3L0CINbGsuDL3EKMEB7OSCO88mf0BQrwp iZVVqUX58UWlOanFhxh9gG6ayCwlmpwPjMO8knhDYxNzU2NTSxMLEzNLHMJK4rzNHikBQgLp iSWp2ampBalFMOOYODilGhhn99yc1qavelJPKcBawzL6ToekaZ0Kz85V65/bJXembc6XTT+a 3BjrpMOoeqPZ98iN9t2rLRaY6+6aLFS+7+rkbTsil7W237gVtrjmQetlJrWLx3OydRNd75x8 Me15/rp5k20YTM68zT3Qevqqzs7nUR0p/QnXDF9tUn0tNOvFnuKg4lhLwYlKLMUZiYZazEXF iQDSZwHOogIAAA== X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmAKAwZDhm0uE8ZSvwiK7mG8Djm9GSK32aFvJPLnL4EMWJfn39Nr8MN7/72PojnBnckLf0G This patch adds FDT support to the SPI driver. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - None. drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 3e6c18f..7ecc566 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -28,16 +29,20 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Information about each SPI controller */ struct spi_bus { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ + int node; }; /* A list of spi buses that we know about */ static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; +static unsigned int bus_count; struct exynos_spi_slave { struct spi_slave slave; @@ -50,7 +55,7 @@ struct exynos_spi_slave { static struct spi_bus *spi_get_bus(unsigned dev_index) { - if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS) + if (dev_index < bus_count) return &spi_bus[dev_index]; debug("%s: invalid bus %d", __func__, dev_index); @@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index) (dev_index - 3); } +/* + * Read the SPI config from the device tree node. + * + * @param blob FDT blob to read from + * @param node Node offset to read from + * @param bus SPI bus structure to fill with information + * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing + */ +static int spi_get_config(const void *blob, int node, struct spi_bus *bus) +{ + bus->node = node; + bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + bus->periph_id = pinmux_decode_periph_id(blob, node); + if (bus->periph_id == PERIPH_ID_NONE) { + debug("%s: Invalid peripheral ID %d\n", __func__, + bus->periph_id); + return -FDT_ERR_NOTFOUND; + } + + /* Use 500KHz as a suitable default */ + bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + + return 0; +} + + +/* + * Process a list of nodes, adding them to our list of SPI ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + int i; + + /* build the i2c_controllers[] for each controller */ + for (i = 0; i < count; i++) { + int node = node_list[i]; + struct spi_bus *bus; + + if (node <= 0) + continue; + + bus = &spi_bus[i]; + if (spi_get_config(blob, node, bus)) { + printf("exynos spi_init: failed to decode bus %d\n", + i); + return -1; + } + + debug("spi: controller bus %d at %p, periph_id %d\n", + i, bus->regs, bus->periph_id); + bus->inited = 1; + bus_count++; + } + + return 0; +} + /* Sadly there is no error return from this function */ void spi_init(void) { - int i; + int count; + +#ifdef CONFIG_OF_CONTROL + int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; + const void *blob = gd->fdt_blob; + + count = fdtdec_find_aliases_for_id(blob, "spi", + COMPAT_SAMSUNG_EXYNOS_SPI, node_list, + EXYNOS5_SPI_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count)) + return; + +#else struct spi_bus *bus; - for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { - bus = &spi_bus[i]; - bus->regs = get_spi_base(i); - bus->periph_id = PERIPH_ID_SPI0 + i; + for (count = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { + bus = &spi_bus[count]; + bus->regs = get_spi_base(count); + bus->periph_id = PERIPH_ID_SPI0 + count; /* Although Exynos5 supports upto 50Mhz speed, * we are setting it to 10Mhz for safe side */ bus->frequency = 10000000; bus->inited = 1; + bus->node = 0; + bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; } +#endif }