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[209.132.180.67]) by mx.google.com with ESMTP id c12-v6si1249211pll.433.2018.04.25.09.34.01; Wed, 25 Apr 2018 09:34:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=CKI3zjak; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755845AbeDYQdW (ORCPT + 6 others); Wed, 25 Apr 2018 12:33:22 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:50594 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755545AbeDYQdQ (ORCPT ); Wed, 25 Apr 2018 12:33:16 -0400 Received: by mail-wm0-f66.google.com with SMTP id t11so1340281wmt.0 for ; Wed, 25 Apr 2018 09:33:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+AieFBkHPjj1kaJ08xGZdTc8YCBmkpUljpbPzSNrVdc=; b=CKI3zjakCCmUgHIUqwgV59rcPQ1cRGNJBLYH5cQxysroGECHDiZh4UmjmN4Oq/S6f6 YZ/TikG/1wjcZQL+jzV2W9iN4vvonbQ9ivzSlFTr+ZZl+geTHI7Nu1nwOcGajKNn6/YZ VWNIbQqHdVbXUAuVO7TThx4D8Abmi60l5VWAv7z2KYXHlG4ur43KE2iuXQcyC3Ns9sfV p653fyusCYj3hb/t4P7eWd7jEE31yRycWiz7g/H6AJz1KZLsd+oYdO6BHw8Sr2ZR6VAl 5j+rLIz75ykUwyCMQAYEBFFLwaNoEJKBNSilOzQV7pdh6OMzLe/fQDI1qSzL6TLFyFzY nMqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+AieFBkHPjj1kaJ08xGZdTc8YCBmkpUljpbPzSNrVdc=; b=jFm0aVDDaY0lcaQ63RIURD5HNs6+WTUMZMPX0TVEtljCIL39CTC8Z9kz+auz1V47R+ rWMXhQvGCoUBTRu500C0eo5hO5i8okj7hhqA6XQneT8tlzPetlHkXAr/I4bIx7DLjryG ZmoVppPP0lbP197pF/VJXGCauuN79Xl6q5kG8gVkhJYSviSbag1ra3mS4rEXbY6+C47g qL5mbHJmc8rMRRLX+ZUWA/LRGmWxhUDNzevic+9WGnFOkt2olX/0ChjPIqbTE6+lwTba HasdlmfqpXUWFMAsB5YEHOvvreYSt5f6sqNptaJEP993WFb+eXvGp+SXCEhgUe43bRCw L31w== X-Gm-Message-State: ALQs6tAOJFmqdBH0vSBrcSL1Z8O1emwgbBtQyvvaFbcW8sPkL0w6tKl2 ZBoUY5EeMXDu/XZHLRo9Bs39r77R X-Received: by 10.28.5.81 with SMTP id 78mr1502544wmf.60.1524673994611; Wed, 25 Apr 2018 09:33:14 -0700 (PDT) Received: from boomer.baylibre.local ([2a01:e34:eeb6:4690:3146:aafc:91d9:4b96]) by smtp.googlemail.com with ESMTPSA id 44-v6sm17300548wrk.48.2018.04.25.09.33.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Apr 2018 09:33:13 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , Michael Turquette , Stephen Boyd , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/7] clk: meson: add triple phase clock driver Date: Wed, 25 Apr 2018 18:33:00 +0200 Message-Id: <20180425163304.10852-4-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180425163304.10852-1-jbrunet@baylibre.com> References: <20180425163304.10852-1-jbrunet@baylibre.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a driver to control the output of the sample clock generator found in the axg audio clock controller. The goal of this driver is to coherently control the phase provided to the different element using the sample clock generator. This simplify the usage of the sample clock generator a lot, without comprising the ability of the SoC. Signed-off-by: Jerome Brunet --- drivers/clk/meson/Kconfig | 5 +++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/clk-triphase.c | 68 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/meson/clkc-audio.h | 20 ++++++++++++ 4 files changed, 94 insertions(+) create mode 100644 drivers/clk/meson/clk-triphase.c create mode 100644 drivers/clk/meson/clkc-audio.h -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 87d69573e172..7f7fd6fb3809 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -3,6 +3,11 @@ config COMMON_CLK_AMLOGIC depends on ARCH_MESON || COMPILE_TEST select COMMON_CLK_REGMAP_MESON +config COMMON_CLK_AMLOGIC_AUDIO + bool + depends on ARCH_MESON || COMPILE_TEST + select COMMON_CLK_AMLOGIC + config COMMON_CLK_REGMAP_MESON bool select REGMAP diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 352fb848c406..64bb917fe1f0 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-audio-divider.o obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-phase.o +obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += clk-triphase.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o gxbb-aoclk-32k.o obj-$(CONFIG_COMMON_CLK_AXG) += axg.o diff --git a/drivers/clk/meson/clk-triphase.c b/drivers/clk/meson/clk-triphase.c new file mode 100644 index 000000000000..9508c03c73c1 --- /dev/null +++ b/drivers/clk/meson/clk-triphase.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 BayLibre, SAS. + * Author: Jerome Brunet + */ + +#include +#include "clkc-audio.h" + +/* + * This is a special clock for the audio controller. + * The phase of mst_sclk clock output can be controlled independently + * for the outside world (ph0), the tdmout (ph1) and tdmin (ph2). + * Controlling these 3 phases as just one makes things simpler and + * give the same clock view to all the element on the i2s bus. + * If necessary, we can still control the phase in the tdm block + * which makes these independent control redundant. + */ +static inline struct meson_clk_triphase_data * +meson_clk_triphase_data(struct clk_regmap *clk) +{ + return (struct meson_clk_triphase_data *)clk->data; +} + +static void meson_clk_triphase_sync(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); + unsigned int val; + + /* Get phase 0 and sync it to phase 1 and 2 */ + val = meson_parm_read(clk->map, &tph->ph0); + meson_parm_write(clk->map, &tph->ph1, val); + meson_parm_write(clk->map, &tph->ph2, val); +} + +static int meson_clk_triphase_get_phase(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); + unsigned int val; + + /* Phase are in sync, reading phase 0 is enough */ + val = meson_parm_read(clk->map, &tph->ph0); + + return meson_clk_degrees_from_val(val, tph->ph0.width); +} + +static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk); + unsigned int val; + + val = meson_clk_degrees_to_val(degrees, tph->ph0.width); + meson_parm_write(clk->map, &tph->ph0, val); + meson_parm_write(clk->map, &tph->ph1, val); + meson_parm_write(clk->map, &tph->ph2, val); + + return 0; +} + +const struct clk_ops meson_clk_triphase_ops = { + .init = meson_clk_triphase_sync, + .get_phase = meson_clk_triphase_get_phase, + .set_phase = meson_clk_triphase_set_phase, +}; +EXPORT_SYMBOL_GPL(meson_clk_triphase_ops); diff --git a/drivers/clk/meson/clkc-audio.h b/drivers/clk/meson/clkc-audio.h new file mode 100644 index 000000000000..286ff1201258 --- /dev/null +++ b/drivers/clk/meson/clkc-audio.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018 BayLibre, SAS. + * Author: Jerome Brunet + */ + +#ifndef __MESON_CLKC_AUDIO_H +#define __MESON_CLKC_AUDIO_H + +#include "clkc.h" + +struct meson_clk_triphase_data { + struct parm ph0; + struct parm ph1; + struct parm ph2; +}; + +extern const struct clk_ops meson_clk_triphase_ops; + +#endif /* __MESON_CLKC_AUDIO_H */