From patchwork Tue May 1 08:59:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 134739 Delivered-To: patches@linaro.org Received: by 10.46.151.6 with SMTP id r6csp4726973lji; Tue, 1 May 2018 01:59:43 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrDq1uQXanpYoztrBuGQuZwV8cPFkwIs/JSlszp1+j3reYOd7SjIEc0b2DL0NcLCFxsFQKt X-Received: by 2002:adf:df02:: with SMTP id y2-v6mr11739454wrl.92.1525165183202; Tue, 01 May 2018 01:59:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525165183; cv=none; d=google.com; s=arc-20160816; b=pYPQwbF/0NntLxglYonAPuJXX/oG//x+Qp+juFM5Phy44WQIoX/Z6OzwcvYkvrXdMz om/ONi8QndpZI58H9jplk5pyJgrkPMwtmUDk5baDW8ODaAgOpGeSu5s6GD7Adhjb59h8 C3SIA48DN7T5S1QFDQaW1wuk5VIpcyfR/ZcBnoBQLhly8fVWwaK/9WdYeZP7tUr/bcOH 1+81H+prqINhRxaXNpPDX4kzARkTPfGy1lneH+IM9HwC4VTM1rvc8rxZEgMCLMcRumUF 6yK12uqksfVK74gNHWoYdn91llfYmUXwT1CN49JcTzQ1K+0P/3WDjH0UKM65klQxzLb9 AFgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=7rt1kA8zfjNs6NW67yzsnbZLUHEZuF3yPBvLAUFo5W0=; b=Hfy0UOXnMO0EXR6cvz9cdwh6tky2ejQzCpvqHSq1Wg99CJ55VnRfPNqvGuzF2/FCO2 CPJJY6TqmhuSBih+FLJRh3p/+1vfNe535vRC2mxfxWalF1ciCF9mbmBVxHyIBQ6Y93rX EiEpbhFZ7HkN6RlulCLMynHZzktt0yVdqdY7L2PcxP6VXQ76AX2RJM1uf4tUQoX3aNqe mOJgPmFhmuCpqijG92AeWbqv+Qpb8o5pypKk4Lpcaz0UD9elq9Ii4nyI/AFhdzsBQSRk VRiz56dWoNwmh+qKFwomkfWB1d/LyNbqEUqp2YIm9wrp62RncUiTjNi+Doeko3qTTgqA EW/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id f54-v6si7418710wrf.60.2018.05.01.01.59.43 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 01:59:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8Q-0007MK-M4; Tue, 01 May 2018 09:59:42 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eric Auger Subject: [RFC PATCH v2 03/12] Make address_space_map() take a MemTxAttrs argument Date: Tue, 1 May 2018 09:59:30 +0100 Message-Id: <20180501085939.6201-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to address_space_map(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- include/exec/memory.h | 3 ++- include/sysemu/dma.h | 3 ++- exec.c | 6 ++++-- target/ppc/mmu-hash64.c | 3 ++- 4 files changed, 10 insertions(+), 5 deletions(-) -- 2.17.0 diff --git a/include/exec/memory.h b/include/exec/memory.h index f416d1e985..1af4e3cd5b 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1953,9 +1953,10 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_ * @addr: address within that address space * @plen: pointer to length of buffer; updated on return * @is_write: indicates the transfer direction + * @attrs: memory attributes */ void *address_space_map(AddressSpace *as, hwaddr addr, - hwaddr *plen, bool is_write); + hwaddr *plen, bool is_write, MemTxAttrs attrs); /* address_space_unmap: Unmaps a memory region previously mapped by address_space_map() * diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index c228c66513..0d73902634 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -132,7 +132,8 @@ static inline void *dma_memory_map(AddressSpace *as, hwaddr xlen = *len; void *p; - p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE); + p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE, + MEMTXATTRS_UNSPECIFIED); *len = xlen; return p; } diff --git a/exec.c b/exec.c index a0f27b7b8c..eb6471abfe 100644 --- a/exec.c +++ b/exec.c @@ -3494,7 +3494,8 @@ flatview_extend_translation(FlatView *fv, hwaddr addr, void *address_space_map(AddressSpace *as, hwaddr addr, hwaddr *plen, - bool is_write) + bool is_write, + MemTxAttrs attrs) { hwaddr len = *plen; hwaddr l, xlat; @@ -3581,7 +3582,8 @@ void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, int is_write) { - return address_space_map(&address_space_memory, addr, plen, is_write); + return address_space_map(&address_space_memory, addr, plen, is_write, + MEMTXATTRS_UNSPECIFIED); } void cpu_physical_memory_unmap(void *buffer, hwaddr len, diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 7e0adecfd9..4839dc22f0 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -431,7 +431,8 @@ const ppc_hash_pte64_t *ppc_hash64_map_hptes(PowerPCCPU *cpu, return NULL; } - hptes = address_space_map(CPU(cpu)->as, base + pte_offset, &plen, false); + hptes = address_space_map(CPU(cpu)->as, base + pte_offset, &plen, false, + MEMTXATTRS_UNSPECIFIED); if (plen < (n * HASH_PTE_SIZE_64)) { hw_error("%s: Unable to map all requested HPTEs\n", __func__); }