From patchwork Tue May 1 08:59:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 134742 Delivered-To: patches@linaro.org Received: by 10.46.151.6 with SMTP id r6csp4727002lji; Tue, 1 May 2018 01:59:45 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqO0J6nFYitEanwONdZC1ULjyNQlvCZGWkRrfwGI+HTKABGwoGfERrwiDT7tyhRR5fP/Z6S X-Received: by 2002:adf:8b85:: with SMTP id o5-v6mr4434587wra.169.1525165185352; Tue, 01 May 2018 01:59:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525165185; cv=none; d=google.com; s=arc-20160816; b=Tz67LVm3x7oWymW2guS8liOrjaCxraUigdPN4bNnmvm13w+m8P+98h2Q7wVc1hvCFJ SLfRYqPwOaOMb0u78zJQV3lPMxf3XugSWn68X20aQnCF9JqjkVrJN/WtvXj3mIGIT5vW 8X+9kXHGjmw/KFyr4FSH3L98F36R62fd4E/PnQtX4TLyF3H1u3yLxLZ2yssxxxO+Tgo7 ZBRo0ByNGmXaeTHKiMkijty+AmkZ2r3OC9mOerPx7d4uPVhVXmAx6G9Lj+fnDGCMDU+Z e7cVWRjsg0LJr5OiW8hJBRVISihRqxvueuFKZB3WkncGsoRaFTdZLEzgSo7OW30rf5Sh C9nQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=B4DnJpvUy0lpH3tDnV3xA0zOh3ZzpfM57+/CpKbf9M8=; b=gM0hzESgmUIbELonX31ymGIY7mCwYpLc/DK2XEPZ67AatIZSW0MMlXjFw7n36xQ6Ba /hMIuQnUuXhw4l3NVINYtO7kaSnBANj638RLyV6XFdrzrBXar+EUb+La6EbjUx2h92Al +oYEg5I1rfjaTBVaa+2OE9ERArwlz5LkGpT2tifPE3hE6woK8dVPngLLyhxtSkzrWbYi 7W/AgIB7dG6CtRKY03IrbiBZy2tvmZMlBuzWWcg9CRkG8bQzGk88q7OzEYBZFqpIqlJq dIv/XtPfGGU50Jsa7LXaCNLOlz8CcIqQP5/Ayn41h/lor588l4tyd0hW1sjafUHEBvyw Qk7w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 62-v6si703138wrr.454.2018.05.01.01.59.45 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 01:59:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8S-0007Nf-Sf; Tue, 01 May 2018 09:59:44 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eric Auger Subject: [RFC PATCH v2 06/12] Make memory_region_access_valid() take a MemTxAttrs argument Date: Tue, 1 May 2018 09:59:33 +0100 Message-Id: <20180501085939.6201-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to memory_region_access_valid(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. The callsite in flatview_access_valid() is part of a recursive loop flatview_access_valid() -> memory_region_access_valid() -> subpage_accepts() -> flatview_access_valid(); we make it pass MEMTXATTRS_UNSPECIFIED for now, until the next several commits have plumbed an attrs parameter through the rest of the loop and we can add an attrs parameter to flatview_access_valid(). Signed-off-by: Peter Maydell --- include/exec/memory-internal.h | 3 ++- exec.c | 4 +++- hw/s390x/s390-pci-inst.c | 3 ++- memory.c | 7 ++++--- 4 files changed, 11 insertions(+), 6 deletions(-) -- 2.17.0 diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h index 6a5ee42d36..063dca0475 100644 --- a/include/exec/memory-internal.h +++ b/include/exec/memory-internal.h @@ -34,7 +34,8 @@ static inline AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as) extern const MemoryRegionOps unassigned_mem_ops; bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, - unsigned size, bool is_write); + unsigned size, bool is_write, + MemTxAttrs attrs); void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section); AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv); diff --git a/exec.c b/exec.c index e56c3442c7..57a984758e 100644 --- a/exec.c +++ b/exec.c @@ -3433,7 +3433,9 @@ static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, mr = flatview_translate(fv, addr, &xlat, &l, is_write); if (!memory_access_is_direct(mr, is_write)) { l = memory_access_size(mr, l, addr); - if (!memory_region_access_valid(mr, xlat, l, is_write)) { + /* When our callers all have attrs we'll pass them through here */ + if (!memory_region_access_valid(mr, xlat, l, is_write, + MEMTXATTRS_UNSPECIFIED)) { return false; } } diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 3fcc330fe3..2e7b4068c0 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -770,7 +770,8 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, mr = s390_get_subregion(mr, offset, len); offset -= mr->addr; - if (!memory_region_access_valid(mr, offset, len, true)) { + if (!memory_region_access_valid(mr, offset, len, true, + MEMTXATTRS_UNSPECIFIED)) { s390_program_interrupt(env, PGM_OPERAND, 6, ra); return 0; } diff --git a/memory.c b/memory.c index e70b64b8b9..0f8f37a57b 100644 --- a/memory.c +++ b/memory.c @@ -1347,7 +1347,8 @@ static const MemoryRegionOps ram_device_mem_ops = { bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, - bool is_write) + bool is_write, + MemTxAttrs attrs) { int access_size_min, access_size_max; int access_size, i; @@ -1416,7 +1417,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, { MemTxResult r; - if (!memory_region_access_valid(mr, addr, size, false)) { + if (!memory_region_access_valid(mr, addr, size, false, attrs)) { *pval = unassigned_mem_read(mr, addr, size); return MEMTX_DECODE_ERROR; } @@ -1458,7 +1459,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr, unsigned size, MemTxAttrs attrs) { - if (!memory_region_access_valid(mr, addr, size, true)) { + if (!memory_region_access_valid(mr, addr, size, true, attrs)) { unassigned_mem_write(mr, addr, data, size); return MEMTX_DECODE_ERROR; }