From patchwork Tue May 1 08:59:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 134745 Delivered-To: patches@linaro.org Received: by 10.46.151.6 with SMTP id r6csp4727016lji; Tue, 1 May 2018 01:59:46 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqbHlGwzrfUsdlaRqdII9h4gkVLzloqN5gjtlqSfo3OqEZwR3yPfjlNf+ENprw7+6o2sKdN X-Received: by 2002:adf:c613:: with SMTP id n19-v6mr7592509wrg.177.1525165186864; Tue, 01 May 2018 01:59:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525165186; cv=none; d=google.com; s=arc-20160816; b=rwolY2stbfUOsrs8lBaUuTmChjeyRFDmD1ZD5skqnpNgWtwTdY7yEtQJff8vx99BEV VXceIcDLrQKCxmhQrHkLE4DX4OSqKlAZjALlECHl90upmnjvzKtBmiRXVdheLLWKjsh5 TIwAutI+kO42FC1O5qgQpHTL6PyRAmK4fIRAOYfjbcxRV4kilEy/IBPnwZH0ndJoN7Ke 3iedu77iCrY6vjeMlKpMfABfIN11u5yqPuXJCzFT3xr/aaFnlmVZ0tabQzc1po35ptHc 05QWIH6SnARQk3GS2A1GmX0QDY1hc8xGGW+84hqT7qBf1ex6dUwPv6yWlyNaM2t2TY5F Pivw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=7jWbA1knPJNxKhkZeFjcwEeSR82tCg7DrF8wITE7wh0=; b=TDKxt8j1HlCwLhxOR5llFeO892Ecr/dzp0tvS0d8nCKZAbPecZPJTi2kEfKmLhRnDu Qi4a+Ak4xUGM1JWZTwqUW+gNJfQg66wlp2cV+T6C8kNQAWhzRwZAZXK7wm54CwDWXCHZ vLms1lb4aa2IDi972VPzkgm/qBV9qq6s9sa+XkuPpbifdE0inctVMaIiNk7nIt5GRCWz M/3wN2Ifu61tR9kIwuT8p1KI5mBh5EX4/tQQIRPjOxpAco3m0kPMMqbB5l14UrVHPay0 fQy3tw2f74p5ctnWeoKQGunPCe3KKjsSe0v+7uPgrV2myNINhL2MZtb5QJZG6JKZktC0 DR3w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id m126si6597087wmd.104.2018.05.01.01.59.46 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 01:59:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8U-0007Oy-B5; Tue, 01 May 2018 09:59:46 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eric Auger Subject: [RFC PATCH v2 08/12] Make flatview_access_valid() take a MemTxAttrs argument Date: Tue, 1 May 2018 09:59:35 +0100 Message-Id: <20180501085939.6201-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_access_valid(). Its callers now all have an attrs value to hand, so we can correct our earlier temporary use of MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- exec.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) -- 2.17.0 diff --git a/exec.c b/exec.c index 3ceeb0643f..0eef4702a5 100644 --- a/exec.c +++ b/exec.c @@ -2662,7 +2662,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, const uint8_t *buf, int len); static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, - bool is_write); + bool is_write, MemTxAttrs attrs); static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, unsigned len, MemTxAttrs attrs) @@ -2738,7 +2738,7 @@ static bool subpage_accepts(void *opaque, hwaddr addr, #endif return flatview_access_valid(subpage->fv, addr + subpage->base, - len, is_write); + len, is_write, attrs); } static const MemoryRegionOps subpage_ops = { @@ -3426,7 +3426,7 @@ static void cpu_notify_map_clients(void) } static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, - bool is_write) + bool is_write, MemTxAttrs attrs) { MemoryRegion *mr; hwaddr l, xlat; @@ -3437,8 +3437,7 @@ static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, if (!memory_access_is_direct(mr, is_write)) { l = memory_access_size(mr, l, addr); /* When our callers all have attrs we'll pass them through here */ - if (!memory_region_access_valid(mr, xlat, l, is_write, - MEMTXATTRS_UNSPECIFIED)) { + if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) { return false; } } @@ -3458,7 +3457,7 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, rcu_read_lock(); fv = address_space_to_flatview(as); - result = flatview_access_valid(fv, addr, len, is_write); + result = flatview_access_valid(fv, addr, len, is_write, attrs); rcu_read_unlock(); return result; }