From patchwork Tue May 1 08:59:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 134746 Delivered-To: patches@linaro.org Received: by 10.46.151.6 with SMTP id r6csp4727026lji; Tue, 1 May 2018 01:59:47 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrYtD2jOyXteuY14Ihd+eaV7nYmhsWGjsxvlKrQlGCJWjC79u3hFPvPgvNAnjsG0artKzWz X-Received: by 10.28.118.25 with SMTP id r25mr9715525wmc.5.1525165187653; Tue, 01 May 2018 01:59:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525165187; cv=none; d=google.com; s=arc-20160816; b=OnPtKGfVeOegUcctCEhcUa/QG2YbJkjkWgBDJ6IFxZGXg8QVmwM95sUb0GhkenFNWZ e4tutdVRf0tyjXs7qFB8Y98Md8JA91GQj54VjHZ3YDyym8KIC35apAUpQjG1wEYFuSIK 88JSBeouUZHzDax7+4aaWqepwa4G2RiggfsKNkJFB06aQs3nzaEROrz2NtP9TItK/09d pOtbWgzfxwStImSD34oxHWUIsiBanHrj3rd49oB77m6Rr6YPhThmiBjtRmVc9yfMSguc fUY4w1MT84YT4wuPTPTtZK5d3MwXsGV/evPY2E4Yogrly2INrg10H8AHAAVxFzF3ercK d0wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=0maqH6MEUtce+JdoAjtCx6Kd66xvVPM+jl8PINAiU0Y=; b=q0xp/iofnev7Fyv46kGmY20LuaYBfXmHNVW3KNwhMqUMttpA0lciB6P2H6GlZGbclk oJEeYLY3h7nFpFk8gxGg5sTuJ4e7rIt7FSx8H+Y6i9vVLTfZIWtJBnr56E8Fql5TSK2G XZNVMUXUVhBLQ64BYWSp1n4mRPm9rP+doFJGqM5ZviG/ltOZnEyRxwxcFJvod7UK9L3A 0VtmfydXPjRlUPNqm+7EtNO599P7pC1i/RGEVsgTR0BIxG6sAEbJML38YhMP+D9YU3TG xz4gIsjPmexOSnJysoGsdwmoqgD2tg8OaNlMz1bP5FTAfQQBl4gALMEiyVzyP9JrQrry S2qQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id y81-v6si8137873wrc.314.2018.05.01.01.59.47 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 01:59:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8V-0007PX-4G; Tue, 01 May 2018 09:59:47 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eric Auger Subject: [RFC PATCH v2 09/12] Make flatview_translate() take a MemTxAttrs argument Date: Tue, 1 May 2018 09:59:36 +0100 Message-Id: <20180501085939.6201-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_translate(); all its callers now have attrs available. Signed-off-by: Peter Maydell --- include/exec/memory.h | 7 ++++--- exec.c | 17 +++++++++-------- 2 files changed, 13 insertions(+), 11 deletions(-) -- 2.17.0 diff --git a/include/exec/memory.h b/include/exec/memory.h index 7c461b9718..bd50424804 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1914,7 +1914,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, */ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, - hwaddr *len, bool is_write); + hwaddr *len, bool is_write, + MemTxAttrs attrs); static inline MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, hwaddr *xlat, @@ -1922,7 +1923,7 @@ static inline MemoryRegion *address_space_translate(AddressSpace *as, MemTxAttrs attrs) { return flatview_translate(address_space_to_flatview(as), - addr, xlat, len, is_write); + addr, xlat, len, is_write, attrs); } /* address_space_access_valid: check for validity of accessing an address @@ -2024,7 +2025,7 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr, rcu_read_lock(); fv = address_space_to_flatview(as); l = len; - mr = flatview_translate(fv, addr, &addr1, &l, false); + mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); if (len == l && memory_access_is_direct(mr, false)) { ptr = qemu_map_ram_ptr(mr->ram_block, addr1); memcpy(buf, ptr, len); diff --git a/exec.c b/exec.c index 0eef4702a5..41f7a7f5c4 100644 --- a/exec.c +++ b/exec.c @@ -583,7 +583,8 @@ iotlb_fail: /* Called from RCU critical section */ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, - hwaddr *plen, bool is_write) + hwaddr *plen, bool is_write, + MemTxAttrs attrs) { MemoryRegion *mr; MemoryRegionSection section; @@ -3117,7 +3118,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, } l = len; - mr = flatview_translate(fv, addr, &addr1, &l, true); + mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); } return result; @@ -3133,7 +3134,7 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, MemTxResult result = MEMTX_OK; l = len; - mr = flatview_translate(fv, addr, &addr1, &l, true); + mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); result = flatview_write_continue(fv, addr, attrs, buf, len, addr1, l, mr); @@ -3204,7 +3205,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, } l = len; - mr = flatview_translate(fv, addr, &addr1, &l, false); + mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); } return result; @@ -3219,7 +3220,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, MemoryRegion *mr; l = len; - mr = flatview_translate(fv, addr, &addr1, &l, false); + mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); return flatview_read_continue(fv, addr, attrs, buf, len, addr1, l, mr); } @@ -3433,7 +3434,7 @@ static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, while (len > 0) { l = len; - mr = flatview_translate(fv, addr, &xlat, &l, is_write); + mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); if (!memory_access_is_direct(mr, is_write)) { l = memory_access_size(mr, l, addr); /* When our callers all have attrs we'll pass them through here */ @@ -3482,7 +3483,7 @@ flatview_extend_translation(FlatView *fv, hwaddr addr, len = target_len; this_mr = flatview_translate(fv, addr, &xlat, - &len, is_write); + &len, is_write, attrs); if (this_mr != mr || xlat != base + done) { return done; } @@ -3515,7 +3516,7 @@ void *address_space_map(AddressSpace *as, l = len; rcu_read_lock(); fv = address_space_to_flatview(as); - mr = flatview_translate(fv, addr, &xlat, &l, is_write); + mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs); if (!memory_access_is_direct(mr, is_write)) { if (atomic_xchg(&bounce.in_use, true)) {