From patchwork Tue May 1 08:59:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 134748 Delivered-To: patches@linaro.org Received: by 10.46.151.6 with SMTP id r6csp4727038lji; Tue, 1 May 2018 01:59:49 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpf0wSwifN5CCxqaJyj+Jby4v/juQtPGG1DDrdyfHFCfPEsP/zA3DhQbVYuFI7//HzShO/t X-Received: by 2002:adf:dfcc:: with SMTP id q12-v6mr11170590wrn.68.1525165189153; Tue, 01 May 2018 01:59:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525165189; cv=none; d=google.com; s=arc-20160816; b=zyGI8HG6NjAI0u12aedtrCgBx91bPWUj8GIddR4Z623YhUwicheUmulhUEvU7Yt9KP 5X9V0IC3/SDO4bXh/xhu70TjxBRLhfi0WWpUUAxa8L7op+TKEHQSAtAtF1CR5PwOIfwI 9g9R5MJhRQCFjokcG6IY/64YzVGu93XLok8IAtmQ+vVA1dwzTF7h6I+ticBAHdy91wSx RYYVhZ/uQPWngf7upvzDV8ZtyDEhVTVRE50bGn41++9Dx706tBy+dpVWsz+JRT4rWoNV 4nmouhTFAeEBrm5eFi5DGDgQkxh82c4JhpHBljGnk2bFBA0dltkjzBEJx1OQfkjjFab9 jneA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=dbwPFcZbDeHYa2Qx29bldIe4dKEgHeUjga9KUJL8fjY=; b=0ug1OjM8wje7A5aEqmzXSvkMSRTSXqb+6C7J//WeEXJtVc9GSO6B7qBWEtSXc8OXNz QMu2+M6byTxxDQr2/ZqW3VQzs40SNnEJ9G18nWaXJYMIjddzQlHno7VwNI6Y+O/hE//c ZErTcjFvCp6GYMMUnYHGyRPzn2q6A/suQm8vYOzuOlb7U+UNFmbY5i4Kfn8ly+NmssJz hNWyHD4BGtQPNHNB125jzAl6n2IlsZNXOdRE6LE1ynVeGuiDZFymOX9zvezyXEyaO6Sy xeLTMMP1PJV1dx3fyCSPERpV2DbygKlPVeFPa6B3Fot4gcuVCntfBS9yiVvP1gOZLu5q BYPQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 10si6571005wme.114.2018.05.01.01.59.49 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 01:59:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8W-0007Qm-M4; Tue, 01 May 2018 09:59:48 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eric Auger Subject: [RFC PATCH v2 11/12] Make flatview_do_translate() take a MemTxAttrs argument Date: Tue, 1 May 2018 09:59:38 +0100 Message-Id: <20180501085939.6201-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_do_translate(). Signed-off-by: Peter Maydell --- exec.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.17.0 diff --git a/exec.c b/exec.c index c29bf47ce2..9c6d9aae28 100644 --- a/exec.c +++ b/exec.c @@ -476,6 +476,7 @@ address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *x * would tell. It can be @NULL if we don't care about it. * @is_write: whether the translation operation is for write * @is_mmio: whether this can be MMIO, set true if it can + * @attrs: memory transaction attributes * * This function is called from RCU critical section */ @@ -486,7 +487,8 @@ static MemoryRegionSection flatview_do_translate(FlatView *fv, hwaddr *page_mask_out, bool is_write, bool is_mmio, - AddressSpace **target_as) + AddressSpace **target_as, + MemTxAttrs attrs) { IOMMUTLBEntry iotlb; MemoryRegionSection *section; @@ -557,7 +559,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, * but page mask. */ section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat, - NULL, &page_mask, is_write, false, &as); + NULL, &page_mask, is_write, false, &as, + attrs); /* Illegal translation */ if (section.mr == &io_mem_unassigned) { @@ -592,7 +595,7 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, /* This can be MMIO, so setup MMIO bit. */ section = flatview_do_translate(fv, addr, xlat, plen, NULL, - is_write, true, &as); + is_write, true, &as, attrs); mr = section.mr; if (xen_enabled() && memory_access_is_direct(mr, is_write)) {