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[51.7.58.116]) by smtp.gmail.com with ESMTPSA id d9-v6sm16710593wrn.71.2018.05.08.02.37.00 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 May 2018 02:37:01 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [committed][AArch64] Tweak sve/vcond_6.c test Date: Tue, 08 May 2018 10:37:00 +0100 Message-ID: <87in7ysd37.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.3 (gnu/linux) MIME-Version: 1.0 sve/vcond_6.c was effectively testing a three-input logical operation, since the result of BINOP needed to be ANDed with the loop predicate before loading src[i]. This patch makes it really test a binary operation instead. A later patch will add (and optimise) the three-operand case. Tested on aarch64-linux-gnu (with and without SVE) and aaarch64_be-elf. Applied as r260028. Richard 2018-05-08 Richard Sandiford gcc/testsuite/ * gcc.target/aarch64/sve/vcond_6.c (LOOP): Unconditionally load from src[i]. Index: gcc/testsuite/gcc.target/aarch64/sve/vcond_6.c =================================================================== --- gcc/testsuite/gcc.target/aarch64/sve/vcond_6.c 2018-05-08 10:33:15.816153344 +0100 +++ gcc/testsuite/gcc.target/aarch64/sve/vcond_6.c 2018-05-08 10:33:15.970147366 +0100 @@ -19,9 +19,12 @@ #define LOOP(TYPE, BINOP) \ TYPE fallback, int count) \ { \ for (int i = 0; i < count; ++i) \ - dest[i] = (BINOP (__builtin_isunordered (a[i], b[i]), \ - __builtin_isunordered (c[i], d[i])) \ - ? src[i] : fallback); \ + { \ + TYPE srcv = src[i]; \ + dest[i] = (BINOP (__builtin_isunordered (a[i], b[i]), \ + __builtin_isunordered (c[i], d[i])) \ + ? srcv : fallback); \ + } \ } #define TEST_BINOP(T, BINOP) \ @@ -40,9 +43,7 @@ #define TEST_ALL(T) \ TEST_ALL (LOOP) -/* Currently we don't manage to remove ANDs from the other loops. */ -/* { dg-final { scan-assembler-times {\tand\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} 3 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler {\tand\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} } } */ +/* { dg-final { scan-assembler-times {\tand\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} 3 } } */ /* { dg-final { scan-assembler-times {\torr\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} 3 } } */ /* { dg-final { scan-assembler-times {\teor\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} 3 } } */ /* { dg-final { scan-assembler-times {\tnand\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b} 3 } } */