[v7,7/7] ARM64: dts: exynos: Add mem-2-mem Scaler devices

Message ID 20180509085928.2023-8-m.szyprowski@samsung.com
State New
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Series
  • [v7,1/7] drm/exynos: ipp: Add IPP v2 framework
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Commit Message

Marek Szyprowski May 9, 2018, 8:59 a.m.
From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>


There are two Scaler devices in Exynos5433 SoCs. Add nodes for them and
their SYSMMU controllers.

Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)

-- 
2.17.0

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Comments

Inki Dae May 10, 2018, 1 a.m. | #1
2018년 05월 09일 17:59에 Marek Szyprowski 이(가) 쓴 글:
> From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>

> 

> There are two Scaler devices in Exynos5433 SoCs. Add nodes for them and

> their SYSMMU controllers.

> 

> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>


Reviewed-by: Inki Dae <inki.dae@samsung.com>


Thanks,
Inki Dae

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 46 ++++++++++++++++++++++

>  1 file changed, 46 insertions(+)

> 

> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> index ba8157ceaa56..0ec44180d1b7 100644

> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> @@ -1034,6 +1034,30 @@

>  			power-domains = <&pd_gscl>;

>  		};

>  

> +		scaler_0: scaler@15000000 {

> +			compatible = "samsung,exynos5433-scaler";

> +			reg = <0x15000000 0x1294>;

> +			interrupts = <0 402 IRQ_TYPE_LEVEL_HIGH>;

> +			clock-names = "pclk", "aclk", "aclk_xiu";

> +			clocks = <&cmu_mscl CLK_PCLK_M2MSCALER0>,

> +				 <&cmu_mscl CLK_ACLK_M2MSCALER0>,

> +				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>;

> +			iommus = <&sysmmu_scaler_0>;

> +			power-domains = <&pd_mscl>;

> +		};

> +

> +		scaler_1: scaler@15010000 {

> +			compatible = "samsung,exynos5433-scaler";

> +			reg = <0x15010000 0x1294>;

> +			interrupts = <0 403 IRQ_TYPE_LEVEL_HIGH>;

> +			clock-names = "pclk", "aclk", "aclk_xiu";

> +			clocks = <&cmu_mscl CLK_PCLK_M2MSCALER1>,

> +				 <&cmu_mscl CLK_ACLK_M2MSCALER1>,

> +				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>;

> +			iommus = <&sysmmu_scaler_1>;

> +			power-domains = <&pd_mscl>;

> +		};

> +

>  		jpeg: codec@15020000 {

>  			compatible = "samsung,exynos5433-jpeg";

>  			reg = <0x15020000 0x10000>;

> @@ -1137,6 +1161,28 @@

>  			power-domains = <&pd_gscl>;

>  		};

>  

> +		sysmmu_scaler_0: sysmmu@0x15040000 {

> +			compatible = "samsung,exynos-sysmmu";

> +			reg = <0x15040000 0x1000>;

> +			interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;

> +			clock-names = "pclk", "aclk";

> +			clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>,

> +				 <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>;

> +			#iommu-cells = <0>;

> +			power-domains = <&pd_mscl>;

> +		};

> +

> +		sysmmu_scaler_1: sysmmu@0x15050000 {

> +			compatible = "samsung,exynos-sysmmu";

> +			reg = <0x15050000 0x1000>;

> +			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;

> +			clock-names = "pclk", "aclk";

> +			clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>,

> +				 <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>;

> +			#iommu-cells = <0>;

> +			power-domains = <&pd_mscl>;

> +		};

> +

>  		sysmmu_jpeg: sysmmu@15060000 {

>  			compatible = "samsung,exynos-sysmmu";

>  			reg = <0x15060000 0x1000>;

> 

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Krzysztof Kozlowski May 13, 2018, 12:09 p.m. | #2
On Wed, May 09, 2018 at 10:59:28AM +0200, Marek Szyprowski wrote:
> From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>

> 

> There are two Scaler devices in Exynos5433 SoCs. Add nodes for them and

> their SYSMMU controllers.

> 

> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 46 ++++++++++++++++++++++

>  1 file changed, 46 insertions(+)

> 


Thanks, applied.

Best regards,
Krzysztof

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Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index ba8157ceaa56..0ec44180d1b7 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1034,6 +1034,30 @@ 
 			power-domains = <&pd_gscl>;
 		};
 
+		scaler_0: scaler@15000000 {
+			compatible = "samsung,exynos5433-scaler";
+			reg = <0x15000000 0x1294>;
+			interrupts = <0 402 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "pclk", "aclk", "aclk_xiu";
+			clocks = <&cmu_mscl CLK_PCLK_M2MSCALER0>,
+				 <&cmu_mscl CLK_ACLK_M2MSCALER0>,
+				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>;
+			iommus = <&sysmmu_scaler_0>;
+			power-domains = <&pd_mscl>;
+		};
+
+		scaler_1: scaler@15010000 {
+			compatible = "samsung,exynos5433-scaler";
+			reg = <0x15010000 0x1294>;
+			interrupts = <0 403 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "pclk", "aclk", "aclk_xiu";
+			clocks = <&cmu_mscl CLK_PCLK_M2MSCALER1>,
+				 <&cmu_mscl CLK_ACLK_M2MSCALER1>,
+				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>;
+			iommus = <&sysmmu_scaler_1>;
+			power-domains = <&pd_mscl>;
+		};
+
 		jpeg: codec@15020000 {
 			compatible = "samsung,exynos5433-jpeg";
 			reg = <0x15020000 0x10000>;
@@ -1137,6 +1161,28 @@ 
 			power-domains = <&pd_gscl>;
 		};
 
+		sysmmu_scaler_0: sysmmu@0x15040000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x15040000 0x1000>;
+			interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "pclk", "aclk";
+			clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>,
+				 <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>;
+			#iommu-cells = <0>;
+			power-domains = <&pd_mscl>;
+		};
+
+		sysmmu_scaler_1: sysmmu@0x15050000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x15050000 0x1000>;
+			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "pclk", "aclk";
+			clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>,
+				 <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>;
+			#iommu-cells = <0>;
+			power-domains = <&pd_mscl>;
+		};
+
 		sysmmu_jpeg: sysmmu@15060000 {
 			compatible = "samsung,exynos-sysmmu";
 			reg = <0x15060000 0x1000>;