From patchwork Fri May 11 02:03:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 135464 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp297817lji; Thu, 10 May 2018 19:04:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpxsSLZj0PbOZY40lI/dVgT/S1nNJimvuSupuZ9cTF7NhaWxonubnwiVMPOftA4OFEH+k6k X-Received: by 2002:a62:32c6:: with SMTP id y189-v6mr3506978pfy.241.1526004270735; Thu, 10 May 2018 19:04:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526004270; cv=none; d=google.com; s=arc-20160816; b=Aaj7l4YDJ8MuX0rFfI4M3upr3Ur/H8+s54FfdVJY9iq2vloUQznwOg1YK7jJaPM+zI XUHGqYixUBuCuw28nKS7jtq6BFdKWLalFCm8NTKl/zexJylU5UWBUvXJCSZk+ruxKFhX eXgq5/4vnnU8itwR7dMC/cHLe0npBkoP2md1v+GBppv93iLLTbyFuRbMkHcC1RLZ+jbR aKJVPaSAqath28P/5Yyi2crcUsWLPs7VJQQVf25pjnX1aOJhsow1T1iu1ch/UCVGsyLf w536ia/W65tBakeddjuWtYWOkKCEUgNgJs1jlIc71pKSAaTJ2KV9WM5WPL7SS/Yc/RaS AMFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=E747X36OkG/U0BTx0NEhyVkZW/a1ORsHS66L7alb+eM=; b=1GWExg7kyGDqD1qfJO3D5GSjyiGFxnxR4WEHB3YRQ6JCp5R1A6nRuAwufL5hz2o3T6 gtEOXgyGRHmvZAO1cMoRYykALUv6bKAPenexCpSXHqnNseOr9pyhDjX7BBWK3AAR/hMm zPHDG+gHy9jLXGkHkevnEkr1rTgKuQqbP414ftpc+xhSqW3TPBvFOwF3q3fgpayQkvAT iR3WLNlSXtb6eiyLd5VyzqSVzSzG8xZczftnwNiydeqjD71sqMUgrhaxeH/T+fQ1Q57u W5ehNxuAn+3vGJ90Gniidgilvv4K8afoAkfD8Fjlo2eAUfi7tzDhlsHOQsU5na5Fwyrk tqnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Y9c3nN3C; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s12-v6si1826064pgn.194.2018.05.10.19.04.30; Thu, 10 May 2018 19:04:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Y9c3nN3C; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751168AbeEKCE3 (ORCPT + 6 others); Thu, 10 May 2018 22:04:29 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:40210 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751345AbeEKCE2 (ORCPT ); Thu, 10 May 2018 22:04:28 -0400 Received: by mail-pf0-f193.google.com with SMTP id f189-v6so1949437pfa.7 for ; Thu, 10 May 2018 19:04:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HHYmCJ6DQqNeKa4Aixp/iPqCwVOL9Rw83wrdq3fOQwY=; b=Y9c3nN3CLm9i2piWJzBDHpuQSkhHYeZqZpMrZPFG6uKc7pcnY/gWrW44gUlyfSidnz mY/MMKW5VWsi5OOYMaKmuElyPo5WoTKjq5LKXsQ+tWuNp1lDfdkt+Nm4ykbA/CsWuFVG 838Mnh7sCwqmin658eTEDR/W+26mI8/m+QMq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HHYmCJ6DQqNeKa4Aixp/iPqCwVOL9Rw83wrdq3fOQwY=; b=YsTt1q3tzuFYsq5ytBRVSl91ABaUu5J22BCiw9Mbtq9OnqhaiJPO299hNqNsWKcSs8 Ck6WzlHhJOv4JSgPloKDseq97IuibqWKCdo5ZZO/NHA2DnSRb6YNWSsNH0W/0bYevpUT IO5GDI4M9h2bsmUWJMuggeaoMAFyo6YeU9IZamDGOYm/ylz1bxU1m9MfRRmA5z1QLg7T hGlTMwFyAw0plEvscXqNRULJzugALvrCHoHIvMuZLBBJ+a5AdajznaquQ+i4ut9ZLpqp ewMLMVY9lasWrwc45OuwDhvd/4B4MqgvjZUb1U7TJk6p3MQ/ibyw0ImTXKo7v7Q2hopi B6+g== X-Gm-Message-State: ALKqPwfu0KMHLbtx0X7j4z7K03NpQbH0hbsRLB/85Ht/R3hw9b8kaIMd I/pALgf5NH74GoZDgiuEMqNvBQ== X-Received: by 2002:a62:ce4e:: with SMTP id y75-v6mr3464476pfg.175.1526004268264; Thu, 10 May 2018 19:04:28 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.100]) by smtp.gmail.com with ESMTPSA id x5-v6sm2955254pgv.15.2018.05.10.19.04.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 10 May 2018 19:04:26 -0700 (PDT) From: Shawn Guo To: Wei Xu Cc: Jianguo Sun , Jiancheng Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shawn Guo Subject: [PATCH 2/3] arm64: dts: hi3798cv200: enable usb2 support for poplar board Date: Fri, 11 May 2018 10:03:39 +0800 Message-Id: <1526004220-17030-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526004220-17030-1-git-send-email-shawn.guo@linaro.org> References: <1526004220-17030-1-git-send-email-shawn.guo@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It adds usb2 phy devices, and enables ehci/ohci support for Hi3798CV200 Poplar board. Signed-off-by: Shawn Guo --- .../boot/dts/hisilicon/hi3798cv200-poplar.dts | 8 +++ arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 68 ++++++++++++++++++++++ 2 files changed, 76 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts index c4382e1f3c92..b0b790a5aa8d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts @@ -72,6 +72,10 @@ }; }; +&ehci { + status = "okay"; +}; + &gmac1 { status = "okay"; #address-cells = <1>; @@ -155,6 +159,10 @@ status = "okay"; }; +&ohci { + status = "okay"; +}; + &pcie { reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; vpcie-supply = <®_pcie>; diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index 5b73403551e6..c1723ef01cac 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -116,6 +116,42 @@ #size-cells = <1>; ranges = <0x0 0x8a20000 0x1000>; + usb2_phy1: usb2-phy@120 { + compatible = "hisilicon,hi3798cv200-usb2-phy"; + reg = <0x120 0x4>; + clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; + resets = <&crg 0xbc 4>; + #address-cells = <1>; + #size-cells = <0>; + + usb2_phy1_port0: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&crg 0xbc 8>; + }; + + usb2_phy1_port1: phy@1 { + reg = <1>; + #phy-cells = <0>; + resets = <&crg 0xbc 9>; + }; + }; + + usb2_phy2: usb2-phy@124 { + compatible = "hisilicon,hi3798cv200-usb2-phy"; + reg = <0x124 0x4>; + clocks = <&crg HISTB_USB2_PHY2_REF_CLK>; + resets = <&crg 0xbc 6>; + #address-cells = <1>; + #size-cells = <0>; + + usb2_phy2_port0: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&crg 0xbc 10>; + }; + }; + combphy0: phy@850 { compatible = "hisilicon,hi3798cv200-combphy"; reg = <0x850 0x8>; @@ -482,5 +518,37 @@ phy-names = "phy"; status = "disabled"; }; + + ohci: ohci@9880000 { + compatible = "generic-ohci"; + reg = <0x9880000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_USB2_BUS_CLK>, + <&crg HISTB_USB2_12M_CLK>, + <&crg HISTB_USB2_48M_CLK>; + clock-names = "bus", "clk12", "clk48"; + resets = <&crg 0xb8 12>; + reset-names = "bus"; + phys = <&usb2_phy1_port0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci: ehci@9890000 { + compatible = "generic-ehci"; + reg = <0x9890000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_USB2_BUS_CLK>, + <&crg HISTB_USB2_PHY_CLK>, + <&crg HISTB_USB2_UTMI_CLK>; + clock-names = "bus", "phy", "utmi"; + resets = <&crg 0xb8 12>, + <&crg 0xb8 16>, + <&crg 0xb8 13>; + reset-names = "bus", "phy", "utmi"; + phys = <&usb2_phy1_port0>; + phy-names = "usb"; + status = "disabled"; + }; }; };