From patchwork Fri May 11 13:32:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 135538 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp880041lji; Fri, 11 May 2018 06:32:28 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrK3RnRya+r5BZaFtJGJQzPCtAc3p02G96/zzG4UoteLAvmCqIr4Vkdbnuqoe0dmkcUHkQD X-Received: by 2002:a65:5288:: with SMTP id y8-v6mr4561828pgp.69.1526045548699; Fri, 11 May 2018 06:32:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526045548; cv=none; d=google.com; s=arc-20160816; b=RENqeYBRbWx2Nif0pa63YTZOkdgv/pqmQDR7GwpyYvR/dDyU5pg42BAqJFc4bIn9CT vyi1BAiLVPYxyHDERpaEdvERtHa6xe6vO6UE6pPEpfc204Yd8DsSliG0qvv1c/g2pCGG Lry4KUL8k83FI4RoZL5yr7nQasbGN86WWEi+WM0q/Fm+tftx2VTGlQMPVj95ta5s9ATu UMJIpKckN5+YI3p3fJkbHExqzIfI5lDdSA2BIbZx2Hx332fIuvn3EEi1Mb8EKSBa4/hN YQIPavo968DtN8wzov7s9I4TJy8sDXWmj+vtE3uhNDS252vQqXBZaMbn9midi/kP65i5 HrAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:date:message-id:openpgp:subject:from:to :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=OBTSzf8bi3a/eEjCuEOAZT69YbMUvolatoe8N4m6nok=; b=fyG6wxTPsGkiPNresC4X2HMTAo5hcoRuN6tMixCzlz4VJFMKIotpVAqRK+wf9LL0Fz I2/0r7HHQ0Y0s9M+Alpgvx0u1nJQlrSXwDnGUDSVu0/lPlcc+AeJHDQnmLqtkerqFQNU BT2vwN0zlAtOdPpXQXNwsvy2xfas9+pOxqAPXcSsPv0gMnaSUxGentyuV6u9BUVi+5hB F2Edcr06ylewttLAD/+Hgm/FzljRBqDRu+E5pObQklXJ4xACi/0VbxqcHLYY18sajASa sRQcS3583YCmLcd/FYZxTyubqvMaNhxQbPLtlMrhB93eNY2wyXd+EAfxNDb4OMMKcHyB PMrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=yWbgY94G; spf=pass (google.com: domain of gcc-patches-return-477589-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-477589-patch=linaro.org@gcc.gnu.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id b16-v6si3228029pfd.240.2018.05.11.06.32.28 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 May 2018 06:32:28 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-477589-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=yWbgY94G; spf=pass (google.com: domain of gcc-patches-return-477589-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-477589-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=WpPQcMasRE+VgtL9oV/YPduwS7GcOwj9l5y3YZzyCBpzt9lKmI 7uUm/njZVypiKIPhVwkHAqtoB2HD5QfCiHd3xwhwH1H9raTdl8v5sAvNsPIOB2zS VyDxRZ8StBFPUbI6l8gqrkbR497W0AnDGE92ofwO/MbjTlKGiAuYL6b+M= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=+1j2ZO857pWasyZH3lMxJxZHBq4=; b=yWbgY94GfqUpgy5BOoSN 0zqgfwshGfd/j/fm2VOnSVCDFLwvZ8yC1Q9NDa8HnqZwyAgh0Lm9qL80KI7NAuzd LgyqxNQ4sL/vOEbxy81DGhjgzD7nSqua67+Dssg2ctg4Uy/L48yMpZmg+3BARQg/ CrAa0+B5bchpLyyrmb80pMs= Received: (qmail 93717 invoked by alias); 11 May 2018 13:32:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 93680 invoked by uid 89); 11 May 2018 13:32:16 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy=products X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 11 May 2018 13:32:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 59E881596; Fri, 11 May 2018 06:32:13 -0700 (PDT) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.67]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CC53D3F220; Fri, 11 May 2018 06:32:12 -0700 (PDT) To: gcc-patches From: "Richard Earnshaw (lists)" Subject: [arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities Openpgp: preference=signencrypt Message-ID: Date: Fri, 11 May 2018 14:32:11 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 My patch last year to automate passing the be8 flag to the linker had a nasty flaw in that I forgot entirely that the ARMv6-M architecture did not derive its capabilities directly from the ARMv6 capability list, but was a new group of capabilities (since it needs to leave out the ARM -- notm -- feature bit). The feature list defined was thus missing the be8 bit. Furthermore, any product derived from that feature group consequently lacked the be8 feature as well and this included all ARMv7 and ARMv8 parts. The fix is embarrassingly simple... PR target/85733 * config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature. Committed to trunk and gcc-8 branches. diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index fce30e4..96972a0 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -234,7 +234,7 @@ define fgroup ARMv6zk ARMv6k define fgroup ARMv6t2 ARMv6 thumb2 # This is suspect. ARMv6-m doesn't really pull in any useful features # from ARMv5* or ARMv6. -define fgroup ARMv6m mode32 armv3m armv4 thumb armv5 armv5e armv6 +define fgroup ARMv6m mode32 armv3m armv4 thumb armv5 armv5e armv6 be8 # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and # integer SIMD instructions that are in ARMv6T2. */ define fgroup ARMv7 ARMv6m thumb2 armv7