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[209.132.180.67]) by mx.google.com with ESMTP id 5-v6si9106266plc.203.2018.05.14.01.57.18; Mon, 14 May 2018 01:57:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UgkJ7DPr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752379AbeENI5P (ORCPT + 29 others); Mon, 14 May 2018 04:57:15 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:37192 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752352AbeENI5N (ORCPT ); Mon, 14 May 2018 04:57:13 -0400 Received: by mail-pl0-f68.google.com with SMTP id w19-v6so4360351plq.4 for ; Mon, 14 May 2018 01:57:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=NPxlDCjOk7gpJ7ywY/IgHfUOCSQRmo1KxQ6z9d2/zdU=; b=UgkJ7DPrVs2FS+q1sJ5W+xjwGyq9+VgCSMY0eMVdjnId0KNeM2scAqwY5XBLKpE/oI CeW6us/cfX0PZKRFlulEsABrhulsvbrd42LJVd1AgyFWYJkX0cileOmIw84x2AVlyRj0 CjI+taUHbA9uTCIbcDsnThF+PjQwcS/ob8bCs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=NPxlDCjOk7gpJ7ywY/IgHfUOCSQRmo1KxQ6z9d2/zdU=; b=XcAGD9KYNezYU+NxVw2XcYsGkRyXo9FZ+SnN5W+KuteJ+HFAbmpqJ2GDfMeeNvAOOb aBMj41jD3TGjL1auB2nZm+DyusI0XQaZAIT1fdB9GDydJ9yuFseDxUT8C+j9BswRtRy+ yvrPNc/V+MV2npLePhA9bmp1oE8f7ALS2fhzV+0cZvPQ3yhDtuXHjNFsk6S4vlcYPXh4 nrX72kVNy6I3okk6riu6RgA9kk34BPH042azYQgtBm/hdP4dhJ9LCYpFLIv0wZfOC8D2 Q8NP2tCwLLFQFexs5pAjh4Q77jfYCEnm5QjPPypvooCGYwOyXap/Y4ddFjuykCsEp+Hz H2lg== X-Gm-Message-State: ALKqPwdDPOvAjisPfF++zx3HZ2l0mj1pnuUnXjyicbE8ej2KZjGhdpWo 6XOZ5W/hAsdB0GHC7oiFCkMDuA== X-Received: by 2002:a17:902:6041:: with SMTP id a1-v6mr8935877plt.59.1526288233063; Mon, 14 May 2018 01:57:13 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id x71-v6sm23308158pfe.47.2018.05.14.01.57.01 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 May 2018 01:57:12 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [RFC PATCH 07/10] clocksource: timer-ti-32k: Register the persistent clock Date: Mon, 14 May 2018 16:55:33 +0800 Message-Id: <353359ad77f87c01e9cc5a5fce382dbf6e9318e6.1526285602.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since the 32K counter is always available, then we can register the persistent clock to compensate the suspend time for the OS time. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/timer-ti-32k.c | 4 ++++ 2 files changed, 5 insertions(+) -- 1.7.9.5 diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 884719c..ed19757 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -262,6 +262,7 @@ config CLKSRC_TI_32K bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST depends on GENERIC_SCHED_CLOCK select TIMER_OF if OF + select PERSISTENT_CLOCK help This option enables support for Texas Instruments 32.768 Hz clocksource available on many OMAP-like platforms. diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index 880a861..353ff9d 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -41,6 +41,7 @@ #include #include #include +#include /* * 32KHz clocksource ... always available, on pretty most chips except @@ -120,6 +121,9 @@ static int __init ti_32k_timer_init(struct device_node *np) } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); + persistent_clock_init_and_register(omap_32k_read_sched_clock, + CLOCKSOURCE_MASK(32), 32768, 0); + pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); return 0;