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[203.254.224.25]) by mx.google.com with ESMTP id zw4si4695057pbc.154.2012.12.14.04.00.17; Fri, 14 Dec 2012 04:00:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) client-ip=203.254.224.25; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MF0003SNRZZCDB0@mailout2.samsung.com>; Fri, 14 Dec 2012 21:00:16 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id EF.DE.12699.0D41BC05; Fri, 14 Dec 2012 21:00:16 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-86-50cb14d03fea Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 5F.DE.12699.0D41BC05; Fri, 14 Dec 2012 21:00:16 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MF000GYFRKI4870@mmp2.samsung.com>; Fri, 14 Dec 2012 21:00:16 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 16/16] SPI: EXYNOS: Add FDT support to driver. Date: Fri, 14 Dec 2012 17:26:29 +0530 Message-id: <1355486189-432-16-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1355486189-432-1-git-send-email-rajeshwari.s@samsung.com> References: <1355486189-432-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrILMWRmVeSWpSXmKPExsWyRsSkSveCyOkAg87DkhYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyHv1cy1IwWbniS3ddA+NZ6S5GTg4JAROJpu8/mSBs MYkL99azdTFycQgJLGWUeDFzOhNM0ca2CVCJ6YwSbRdvsUM4E5kktm2ezwpSxSZgJLH15DRG EFtEQELiV/9VMJtZIEbi9f4fbCC2sICdxKuvr9lBbBYBVYm725rBNvAKuEu0b/rPCLFNQeLY 1K9gMzmB4iff3GMGsYUE3CRW9Cxjg+gVkPg2+RBLFyMHUL2sxKYDzCD3SAhcZ5PY+OYcM8Qc SYmDK26wTGAUXsDIsIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/dxMjMBxP/3smvYNxVYPFIUYB DkYlHt4PQqcChFgTy4orcw8xSnAwK4nwSh4BCvGmJFZWpRblxxeV5qQWH2L0AbpkIrOUaHI+ MFbySuINjU3MTY1NLY2MzExNcQgrifM2e6QECAmkJ5akZqemFqQWwYxj4uCUamBsfaAyc8Gz TK2Sueqygc+WqP5ft+/5pFC1PLWLD85ET5Sfm6X6xcXJY5egoqfKyX8inKk7fLXMH0RnBdgU Mca23vvcMuOLXpeV3jb5aY1X+VlnrK/8dKOjZ73TqgS/vH8HZ8s+L3GNmjb/5pmuw897HnwO PHKgs3EVY8/Nu4n7N0QLaL3aIrdXiaU4I9FQi7moOBEAUkd1QXQCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jQd0LIqcDDI5847Z4uP4mi8WUw19Y HJg87lzbwxbAGNXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+Ti E6DrlpkDNFtJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmPHo51qWgsnK FV+66xoYz0p3MXJySAiYSGxsm8AGYYtJXLi3Hsjm4hASmM4o0XbxFjuEM5FJYtvm+awgVWwC RhJbT05jBLFFBCQkfvVfBbOZBWIkXu//ATZJWMBO4tXX1+wgNouAqsTdbc1MIDavgLtE+6b/ jBDbFCSOTf0KNpMTKH7yzT1mEFtIwE1iRc8ytgmMvAsYGVYxiqYWJBcUJ6XnGukVJ+YWl+al 6yXn525iBAf7M+kdjKsaLA4xCnAwKvHwfhA6FSDEmlhWXJl7iFGCg1lJhFfyCFCINyWxsiq1 KD++qDQntfgQow/QVROZpUST84GRmFcSb2hsYm5qbGppYmFiZolDWEmct9kjJUBIID2xJDU7 NbUgtQhmHBMHp1QDI9/LBv3YNwIhK3+ZPtz74vOLzuszn0tVqSdwiOu1LzvfabraRzSC42uK 4j5f9dwXR19tsV/y3ox3jqPJsUkMjF+PZV75dpxjku8xzx7hjXqd7XM81n7mczqzk/tc+tn4 ZS1HVnoV2+5oif4g+e+rCevVxgyfo7zTM8tlYydbbr6x/lOVxfmJp5VYijMSDbWYi4oTAVc6 pz2jAgAA X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQnE8AY47YgumJCPO4y0qVvEaugg3kSZTBKEFoGkpkTHSw69rEY2wI25SG9nLawo4127ezgi This patch adds FDT support to the SPI driver. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V1: -Rebased on latest u-boot-samsung drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 3e6c18f..7ecc566 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -28,16 +29,20 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Information about each SPI controller */ struct spi_bus { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ + int node; }; /* A list of spi buses that we know about */ static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; +static unsigned int bus_count; struct exynos_spi_slave { struct spi_slave slave; @@ -50,7 +55,7 @@ struct exynos_spi_slave { static struct spi_bus *spi_get_bus(unsigned dev_index) { - if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS) + if (dev_index < bus_count) return &spi_bus[dev_index]; debug("%s: invalid bus %d", __func__, dev_index); @@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index) (dev_index - 3); } +/* + * Read the SPI config from the device tree node. + * + * @param blob FDT blob to read from + * @param node Node offset to read from + * @param bus SPI bus structure to fill with information + * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing + */ +static int spi_get_config(const void *blob, int node, struct spi_bus *bus) +{ + bus->node = node; + bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + bus->periph_id = pinmux_decode_periph_id(blob, node); + if (bus->periph_id == PERIPH_ID_NONE) { + debug("%s: Invalid peripheral ID %d\n", __func__, + bus->periph_id); + return -FDT_ERR_NOTFOUND; + } + + /* Use 500KHz as a suitable default */ + bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + + return 0; +} + + +/* + * Process a list of nodes, adding them to our list of SPI ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + int i; + + /* build the i2c_controllers[] for each controller */ + for (i = 0; i < count; i++) { + int node = node_list[i]; + struct spi_bus *bus; + + if (node <= 0) + continue; + + bus = &spi_bus[i]; + if (spi_get_config(blob, node, bus)) { + printf("exynos spi_init: failed to decode bus %d\n", + i); + return -1; + } + + debug("spi: controller bus %d at %p, periph_id %d\n", + i, bus->regs, bus->periph_id); + bus->inited = 1; + bus_count++; + } + + return 0; +} + /* Sadly there is no error return from this function */ void spi_init(void) { - int i; + int count; + +#ifdef CONFIG_OF_CONTROL + int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; + const void *blob = gd->fdt_blob; + + count = fdtdec_find_aliases_for_id(blob, "spi", + COMPAT_SAMSUNG_EXYNOS_SPI, node_list, + EXYNOS5_SPI_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count)) + return; + +#else struct spi_bus *bus; - for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { - bus = &spi_bus[i]; - bus->regs = get_spi_base(i); - bus->periph_id = PERIPH_ID_SPI0 + i; + for (count = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { + bus = &spi_bus[count]; + bus->regs = get_spi_base(count); + bus->periph_id = PERIPH_ID_SPI0 + count; /* Although Exynos5 supports upto 50Mhz speed, * we are setting it to 10Mhz for safe side */ bus->frequency = 10000000; bus->inited = 1; + bus->node = 0; + bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; } +#endif }