From patchwork Fri Dec 14 16:19:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 13588 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7E92F23FB4 for ; Fri, 14 Dec 2012 16:19:53 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id EECDEA195F9 for ; Fri, 14 Dec 2012 16:19:52 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id t4so3225969iag.11 for ; Fri, 14 Dec 2012 08:19:52 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:x-received:received-spf :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=jK2LHPais0gD3lFLpcei9wbUjvUBG6JWqLztVVkpdO0=; b=eE8/UNerRDw6d8s0+BLg7weqOzKwZ2CCVIU+yJJKpL19ctUEcTX/KmHT5gGOEEc3u/ IRW2mf4k0Qt1qPIEfoWe4qsaquD2bs7F5PcgYqeXN9Z5BXeDLLBV0x/PY+lKwpvHxBVY VI+6Cai2dNJWjGwNfYL1i0EScOWKAtDBaijRr4B+BnNnweyXHuGIo7fhbbvYI9SGKM/R SwYLMBmvSyLqo1DMkSpFmmAWhtWpO2/EbohVZHw5RmIpa4gnt12uKV85aMLN1hGeF7ib etpETxa5o5a2P2saGEPct4LA6McZZ3un6om1SRv78Cee1McH4YjtZj7mXlDUgk81schd O3+Q== Received: by 10.50.152.137 with SMTP id uy9mr2003700igb.62.1355501992365; Fri, 14 Dec 2012 08:19:52 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp81573igt; Fri, 14 Dec 2012 08:19:51 -0800 (PST) X-Received: by 10.180.86.36 with SMTP id m4mr3607668wiz.5.1355501990964; Fri, 14 Dec 2012 08:19:50 -0800 (PST) Received: from mail-wg0-f45.google.com (mail-wg0-f45.google.com [74.125.82.45]) by mx.google.com with ESMTPS id bu16si14990139wib.41.2012.12.14.08.19.50 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 14 Dec 2012 08:19:50 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.45 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.45; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.45 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) smtp.mail=lee.jones@linaro.org Received: by mail-wg0-f45.google.com with SMTP id dq12so1452927wgb.0 for ; Fri, 14 Dec 2012 08:19:50 -0800 (PST) Received: by 10.194.58.175 with SMTP id s15mr4495562wjq.31.1355501990465; Fri, 14 Dec 2012 08:19:50 -0800 (PST) Received: from localhost.localdomain (cpc1-aztw13-0-0-cust473.18-1.cable.virginmedia.com. [77.102.241.218]) by mx.google.com with ESMTPS id u6sm8325248wif.2.2012.12.14.08.19.49 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 14 Dec 2012 08:19:49 -0800 (PST) From: Lee Jones To: linux-kernel@vger.kernel.org Cc: linus.walleij@linaro.org, Mian Yousaf Kaukab , Lee Jones , Bengt Jonsson Subject: [PATCH 02/21] gpio: ab8500: Make pins configurable Date: Fri, 14 Dec 2012 16:19:20 +0000 Message-Id: <1355501979-1157-3-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1355501979-1157-1-git-send-email-lee.jones@linaro.org> References: <1355501979-1157-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQnH8z5gdsq+3OD39M+D9qSu8Me5kjwLKm8+t+qktbhZRP9hUhRd7y2FAB9eZkQCn9FZ3yZU From: Mian Yousaf Kaukab Make it possible to set the pin configuration either as gpio or specific functionality through the driver interface. Signed-off-by: Lee Jones Signed-off-by: Bengt Jonsson Signed-off-by: Mian Yousaf Kaukab Tested-by: Jonas ABERG --- drivers/gpio/gpio-ab8500.c | 63 ++++++++++++++++++++++++++++++++ include/linux/mfd/abx500/ab8500-gpio.h | 51 ++++++++++++++++++++++++++ 2 files changed, 114 insertions(+) diff --git a/drivers/gpio/gpio-ab8500.c b/drivers/gpio/gpio-ab8500.c index db40acb..c3c7c5a 100644 --- a/drivers/gpio/gpio-ab8500.c +++ b/drivers/gpio/gpio-ab8500.c @@ -495,6 +495,69 @@ static int __devexit ab8500_gpio_remove(struct platform_device *pdev) return 0; } +/* + * ab8500_gpio_config_select() + * + * Configure functionality of pin, either specific use or GPIO. + * @dev: device pointer + * @gpio: gpio number + * @gpio_select: true if the pin should be used as GPIO + */ +int ab8500_gpio_config_select(struct device *dev, + enum ab8500_pin gpio, bool gpio_select) +{ + u8 offset = gpio - AB8500_PIN_GPIO1; + u8 reg = AB8500_GPIO_SEL1_REG + (offset / 8); + u8 pos = offset % 8; + u8 val = gpio_select ? 1 : 0; + int ret; + + ret = abx500_mask_and_set_register_interruptible(dev, + AB8500_MISC, reg, 1 << pos, val << pos); + if (ret < 0) + dev_err(dev, "%s write failed\n", __func__); + + dev_vdbg(dev, "%s (bank, addr, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", + __func__, AB8500_MISC, reg, 1 << pos, val << pos); + + return ret; +} + +/* + * ab8500_gpio_config_get_select() + * + * Read currently configured functionality, either specific use or GPIO. + * @dev: device pointer + * @gpio: gpio number + * @gpio_select: pointer to pin selection status + */ +int ab8500_gpio_config_get_select(struct device *dev, + enum ab8500_pin gpio, bool *gpio_select) +{ + u8 offset = gpio - AB8500_PIN_GPIO1; + u8 reg = AB8500_GPIO_SEL1_REG + (offset / 8); + u8 pos = offset % 8; + u8 val; + int ret; + + ret = abx500_get_register_interruptible(dev, + AB8500_MISC, reg, &val); + if (ret < 0) { + dev_err(dev, "%s read failed\n", __func__); + return ret; + } + + if (val & (1 << pos)) + *gpio_select = true; + else + *gpio_select = false; + + dev_vdbg(dev, "%s (bank, addr, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", + __func__, AB8500_MISC, reg, 1 << pos, val); + + return 0; +} + static struct platform_driver ab8500_gpio_driver = { .driver = { .name = "ab8500-gpio", diff --git a/include/linux/mfd/abx500/ab8500-gpio.h b/include/linux/mfd/abx500/ab8500-gpio.h index 2387c20..5caa615 100644 --- a/include/linux/mfd/abx500/ab8500-gpio.h +++ b/include/linux/mfd/abx500/ab8500-gpio.h @@ -20,4 +20,55 @@ struct ab8500_gpio_platform_data { u8 config_reg[8]; }; +enum ab8500_pin { + AB8500_PIN_GPIO1 = 0, + AB8500_PIN_GPIO2, + AB8500_PIN_GPIO3, + AB8500_PIN_GPIO4, + AB8500_PIN_GPIO5, + AB8500_PIN_GPIO6, + AB8500_PIN_GPIO7, + AB8500_PIN_GPIO8, + AB8500_PIN_GPIO9, + AB8500_PIN_GPIO10, + AB8500_PIN_GPIO11, + AB8500_PIN_GPIO12, + AB8500_PIN_GPIO13, + AB8500_PIN_GPIO14, + AB8500_PIN_GPIO15, + AB8500_PIN_GPIO16, + AB8500_PIN_GPIO17, + AB8500_PIN_GPIO18, + AB8500_PIN_GPIO19, + AB8500_PIN_GPIO20, + AB8500_PIN_GPIO21, + AB8500_PIN_GPIO22, + AB8500_PIN_GPIO23, + AB8500_PIN_GPIO24, + AB8500_PIN_GPIO25, + AB8500_PIN_GPIO26, + AB8500_PIN_GPIO27, + AB8500_PIN_GPIO28, + AB8500_PIN_GPIO29, + AB8500_PIN_GPIO30, + AB8500_PIN_GPIO31, + AB8500_PIN_GPIO32, + AB8500_PIN_GPIO33, + AB8500_PIN_GPIO34, + AB8500_PIN_GPIO35, + AB8500_PIN_GPIO36, + AB8500_PIN_GPIO37, + AB8500_PIN_GPIO38, + AB8500_PIN_GPIO39, + AB8500_PIN_GPIO40, + AB8500_PIN_GPIO41, + AB8500_PIN_GPIO42, +}; + +int ab8500_gpio_config_select(struct device *dev, + enum ab8500_pin gpio, bool gpio_select); + +int ab8500_gpio_config_get_select(struct device *dev, + enum ab8500_pin gpio, bool *gpio_select); + #endif /* _AB8500_GPIO_H */