[PULL,14/16] target/arm: Fix sqrt_f16 exception raising

Message ID	20180515140707.15957-15-peter.maydell@linaro.org
State	Accepted
Commit	905edee9101c54cda5b72286b7f7607cf1c3c4d1
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:05 +0100 Message-Id: <20180515140707.15957-15-peter.maydell@linaro.org> In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 14/16] target/arm: Fix sqrt_f16 exception raising Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target-arm queue \| expand [PULL,00/16] target-arm queue [PULL,01/16] fpu/softfloat: int_to_float ensure r fully initialised [PULL,02/16] fpu/softfloat: Don't set Invalid for float-to-int(MAXINT) [PULL,03/16] target/arm: Fix fp_status_f16 tininess before rounding [PULL,04/16] target/arm: Implement FMOV (general) for fp16 [PULL,05/16] target/arm: Early exit after unallocated_encoding in disas_fp_int_conv [PULL,06/16] target/arm: Implement FCVT (scalar, integer) for fp16 [PULL,07/16] target/arm: Implement FCVT (scalar, fixed-point) for fp16 [PULL,08/16] target/arm: Introduce and use read_fp_hreg [PULL,09/16] target/arm: Implement FP data-processing (2 source) for fp16 [PULL,10/16] target/arm: Implement FP data-processing (3 source) for fp16 [PULL,11/16] target/arm: Implement FCMP for fp16 [PULL,12/16] target/arm: Implement FCSEL for fp16 [PULL,13/16] target/arm: Implement FMOV (immediate) for fp16 [PULL,14/16] target/arm: Fix sqrt_f16 exception raising [PULL,15/16] sdcard: Correct CRC16 offset in sd_function_switch() [PULL,16/16] tcg: Optionally log FPU state in TCG -d cpu logging

Message ID

20180515140707.15957-15-peter.maydell@linaro.org

State

Accepted

Commit

905edee9101c54cda5b72286b7f7607cf1c3c4d1

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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Date: Tue, 15 May 2018 15:07:05 +0100
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Subject: [Qemu-devel] [PULL 14/16] target/arm: Fix sqrt_f16 exception raising
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Series

target-arm queue | expand

Commit Message

Peter Maydell May 15, 2018, 2:07 p.m. UTC

From: Alex Bennée <alex.bennee@linaro.org>


We are meant to explicitly pass fpst, not cpu_env.

Cc: qemu-stable@nongnu.org
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Tested-by: Alex Bennée <alex.bennee@linaro.org>

Message-id: 20180512003217.9105-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/translate-a64.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
2.17.0

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 35997969b4..a0b0c43d12 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4976,7 +4976,8 @@  static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn)
         tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
         break;
     case 0x3: /* FSQRT */
-        gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env);
+        fpst = get_fpstatus_ptr(true);
+        gen_helper_sqrt_f16(tcg_res, tcg_op, fpst);
         break;
     case 0x8: /* FRINTN */
     case 0x9: /* FRINTP */

[PULL,14/16] target/arm: Fix sqrt_f16 exception raising

Commit Message

Patch