diff mbox series

[v2,1/2] target/arm: support reading of CNT[VCT|FRQ]_EL0 from user-space

Message ID 20180518114424.18054-2-alex.bennee@linaro.org
State Superseded
Headers show
Series support reading of CNT[VCT|FRQ]_EL0 from user-space | expand

Commit Message

Alex Bennée May 18, 2018, 11:44 a.m. UTC
Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0
trap..) user-space has been able to read these system registers. As we
can't use QEMUTimer's in linux-user mode we just directly call
cpu_get_clock().

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>


---
v2
  - include CNTFRQ_EL0 for PL0_R only
---
 target/arm/helper.c | 27 ++++++++++++++++++++++++---
 1 file changed, 24 insertions(+), 3 deletions(-)

-- 
2.17.0

Comments

Peter Maydell May 22, 2018, 11:04 a.m. UTC | #1
On 18 May 2018 at 12:44, Alex Bennée <alex.bennee@linaro.org> wrote:
> Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0

> trap..) user-space has been able to read these system registers. As we

> can't use QEMUTimer's in linux-user mode we just directly call

> cpu_get_clock().

>

> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

>

> ---

> v2

>   - include CNTFRQ_EL0 for PL0_R only

> ---

>  target/arm/helper.c | 27 ++++++++++++++++++++++++---

>  1 file changed, 24 insertions(+), 3 deletions(-)

>

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index db8bbe52a6..39098a15bf 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -2135,11 +2135,32 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {

>  };

>

>  #else

> -/* In user-mode none of the generic timer registers are accessible,

> - * and their implementation depends on QEMU_CLOCK_VIRTUAL and qdev gpio outputs,

> - * so instead just don't register any of them.

> +

> +/* In user-mode most of the generic timer registers are inaccessible

> + * however modern kernels (4.12+) allow access to cntvct_el0

>   */

> +

> +static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)

> +{

> +    /* Currently we have no support for QEMUTimer in linux-user so we

> +     * can't call gt_get_countervalue(env), instead we directly

> +     * call the lower level functions.

> +     */

> +    return cpu_get_clock() / GTIMER_SCALE;

> +}

> +

>  static const ARMCPRegInfo generic_timer_cp_reginfo[] = {

> +    { .name = "CNTFRQ_EL0", .state = ARM_CP_STATE_AA64,

> +      .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 0,

> +      .access = PL0_R /* no PL1_RW in linux-user */,

> +      .fieldoffset = offsetof(CPUARMState, cp15.c14_cntfrq),

> +      .resetvalue = (1000 * 1000 * 1000) / GTIMER_SCALE,


You might as well just make this be .type = ARM_CP_CONST,
since the CPU state field can never change.

Also, perhaps NANOSECONDS_PER_SECOND / GTIMER_SCALE.)

> +    },

> +    { .name = "CNTVCT_EL0", .state = ARM_CP_STATE_AA64,

> +      .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 2,

> +      .access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO,

> +      .readfn = gt_virt_cnt_read,

> +    },

>      REGINFO_SENTINEL

>  };


Do we need to make the 32-bit registers accessible to linux-user
processes too?

(Incidentally, another thing along these lines we should probably
look at is that I think that newer kernels emulate ID register
accesses from EL0, so we should do something to make those
registers work too.)

thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index db8bbe52a6..39098a15bf 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2135,11 +2135,32 @@  static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
 };
 
 #else
-/* In user-mode none of the generic timer registers are accessible,
- * and their implementation depends on QEMU_CLOCK_VIRTUAL and qdev gpio outputs,
- * so instead just don't register any of them.
+
+/* In user-mode most of the generic timer registers are inaccessible
+ * however modern kernels (4.12+) allow access to cntvct_el0
  */
+
+static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
+{
+    /* Currently we have no support for QEMUTimer in linux-user so we
+     * can't call gt_get_countervalue(env), instead we directly
+     * call the lower level functions.
+     */
+    return cpu_get_clock() / GTIMER_SCALE;
+}
+
 static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
+    { .name = "CNTFRQ_EL0", .state = ARM_CP_STATE_AA64,
+      .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 0,
+      .access = PL0_R /* no PL1_RW in linux-user */,
+      .fieldoffset = offsetof(CPUARMState, cp15.c14_cntfrq),
+      .resetvalue = (1000 * 1000 * 1000) / GTIMER_SCALE,
+    },
+    { .name = "CNTVCT_EL0", .state = ARM_CP_STATE_AA64,
+      .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 2,
+      .access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO,
+      .readfn = gt_virt_cnt_read,
+    },
     REGINFO_SENTINEL
 };