From patchwork Thu May 24 14:19:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 136749 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp2272255lji; Thu, 24 May 2018 07:19:55 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpTgqlb4RXyfVwmw1FvS/D9pYixMR7Vj5W5jBscDGTFo+C1/oJWGfpkwoTzZfeT/wAA5fD/ X-Received: by 2002:a63:6fcf:: with SMTP id k198-v6mr6172568pgc.307.1527171594870; Thu, 24 May 2018 07:19:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527171594; cv=none; d=google.com; s=arc-20160816; b=hcqz1YTXy4ILUUZyWXDOh2h73X2ebCO+pvd0ZRQEUnhp6t3H9nfcivcioqWoKR/zzr l4AWNF5Bx9fjJ4RIn+A4X2MGHuulE8o/7yy4bwCto2y2tngpR89nAVd2dnkdEM/Htno6 PrV3sAmfU6uTG0zRZ5werviNRP5T0D+JBbd2zTCaFlz2FVYqrMlrLwLs97lTwe5BPcSN 8ZQ8DOlYGNosgKw7CuSdvuNUyz7sF/lVQHYMOAJh0fhGpkxMI8d+PqYsmHvBP6zoCAiA yMigs/6V3bxNQQLz8FCFvdI5SK8TgHgQmSSzKMJRT21RAez6BuffWQPx4ORcHgErRGcP xl7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=P3Q5EPCrw0FRMDMean8VQYiGOtUhncnLWK6RV6d5N8A=; b=CgT8C7uE8XlHjpTDNVt4ibjrx7XP4z2bcRdUu4kfzYF2nZqfhSvxPIE+34a51BDk85 4jZ0fGza70LAFh4HYqtzW2DVdUzC1TWBvK0LSkx5RF5YTxiPI3YmgGHeCEIL4FJ2fqv2 E6gZKp3ldzRbbV47gSG1HbLCXG95ZFG1RKy/zen4uxyuvV2NVi4yZXvPHDVAtEryksku rT2+UWzFC9JinTJLuqK2X/v/8dRq9Dd8Z2C+iblg1qcPgqHkdKMBt7MwRErOIyHHaElp GEE/S6m8TAP9aQ7XdwLQJXmM1NBxhT18ezIHR/7judcktKuT7b1Jewx8hkHspARVMvL8 Hv4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y7-v6si16741808pgv.409.2018.05.24.07.19.54; Thu, 24 May 2018 07:19:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032153AbeEXOTw (ORCPT + 30 others); Thu, 24 May 2018 10:19:52 -0400 Received: from foss.arm.com ([217.140.101.70]:45672 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032250AbeEXOTp (ORCPT ); Thu, 24 May 2018 10:19:45 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 80408168F; Thu, 24 May 2018 07:19:44 -0700 (PDT) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 67A193F24A; Thu, 24 May 2018 07:19:40 -0700 (PDT) From: Gilad Ben-Yossef To: Simon Horman , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Herbert Xu , "David S. Miller" Cc: Ofir Drang , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org Subject: [PATCH v2 4/5] clk: renesas: r8a7795: add ccree clock bindings Date: Thu, 24 May 2018 15:19:09 +0100 Message-Id: <1527171551-21979-5-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527171551-21979-1-git-send-email-gilad@benyossef.com> References: <1527171551-21979-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the clock used by the CryptoCell 630p instance in the SoC. Signed-off-by: Gilad Ben-Yossef --- This patch depends upon the "clk: renesas: r8a7795: Add CR clock" patch from Geert Uytterhoeven. drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 Reviewed-by: Geert Uytterhoeven diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index e5b1865..a85dd50 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -133,6 +133,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S0D3), DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S0D3), DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3), + DEF_MOD("sceg-pub", 229, R8A7795_CLK_CR), DEF_MOD("cmt3", 300, R8A7795_CLK_R), DEF_MOD("cmt2", 301, R8A7795_CLK_R), DEF_MOD("cmt1", 302, R8A7795_CLK_R),