[v2,PR,gdb/23210] Unset gdbarch significant_addr_bit by default

Message ID 1527296331-32213-1-git-send-email-omair.javaid@linaro.org
State New
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  • [v2,PR,gdb/23210] Unset gdbarch significant_addr_bit by default
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Commit Message

Omair Javaid May 26, 2018, 12:58 a.m.
This version fixes the typo and gdbarch.sh issue highlighted in review.

LGTM?

This patch fixes a bug introduced by fix to AArch64 pointer tagging.

In our fix for tagged pointer support our agreed approach was to sign
extend user-space address after clearing tag bits. This is not same
for all architectures and this patch allows sign extension for
addresses on targets which specifically set significant_addr_bit.

More information about patch that caused the issues and discussion
around tagged pointer support can be found in links below:

https://sourceware.org/ml/gdb-patches/2018-05/msg00000.html
https://sourceware.org/ml/gdb-patches/2017-12/msg00159.html

gdb/ChangeLog:

2018-05-23  Omair Javaid  <omair.javaid@linaro.org>

	* gdbarch.sh (significant_addr_bit): Default to zero when
	not set by target architecture.
	* gdbarch.c: Re-generated.
	* utils.c (address_significant): Update.
---
 gdb/gdbarch.c  | 4 ++--
 gdb/gdbarch.sh | 2 +-
 gdb/utils.c    | 5 +++--
 3 files changed, 6 insertions(+), 5 deletions(-)

-- 
2.7.4

Comments

Pedro Alves May 29, 2018, 12:09 p.m. | #1
On 05/26/2018 01:58 AM, Omair Javaid wrote:
> This version fixes the typo and gdbarch.sh issue highlighted in review.

> 

> LGTM?


I think the resulting API ends up a little weird.  Maybe a better
fit would be something around:

 CORE_ADDR gdbarch_canonical_address (gdbarch *, CORE_ADDR addr);

with the default implementation being a nop [return ADDR] while
Aarch64's implementation would clear the tag and sign extend.

Dunno, not sure, I really did not think that through, and, as
I mentioned before, I'm totally OK with this as is, we understand
the issues and can always change it later.

More important right now is unbreaking 32-bit x86 and the branch.

Thus, OK as is.  Please push to master and branch.

Thanks,
Pedro Alves
Joel Brobecker May 29, 2018, 5:58 p.m. | #2
Hi Omar,

On Sat, May 26, 2018 at 05:58:51AM +0500, Omair Javaid wrote:
> This version fixes the typo and gdbarch.sh issue highlighted in review.

> 

> LGTM?

> 

> This patch fixes a bug introduced by fix to AArch64 pointer tagging.

> 

> In our fix for tagged pointer support our agreed approach was to sign

> extend user-space address after clearing tag bits. This is not same

> for all architectures and this patch allows sign extension for

> addresses on targets which specifically set significant_addr_bit.

> 

> More information about patch that caused the issues and discussion

> around tagged pointer support can be found in links below:

> 

> https://sourceware.org/ml/gdb-patches/2018-05/msg00000.html

> https://sourceware.org/ml/gdb-patches/2017-12/msg00159.html

> 

> gdb/ChangeLog:

> 

> 2018-05-23  Omair Javaid  <omair.javaid@linaro.org>

> 

> 	* gdbarch.sh (significant_addr_bit): Default to zero when

> 	not set by target architecture.

> 	* gdbarch.c: Re-generated.

> 	* utils.c (address_significant): Update.


In addition to Pedro's comments, can you make sure you add "PR
gdb/23210" to the ChangeLog entry?

-- 
Joel

Patch

diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c
index c430ebe..558cc55 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch.c
@@ -615,8 +615,7 @@  verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of stabs_argument_has_addr, invalid_p == 0 */
   /* Skip verify of convert_from_func_ptr_addr, invalid_p == 0 */
   /* Skip verify of addr_bits_remove, invalid_p == 0 */
-  if (gdbarch->significant_addr_bit == 0)
-    gdbarch->significant_addr_bit = gdbarch_addr_bit (gdbarch);
+  /* Skip verify of significant_addr_bit, invalid_p == 0 */
   /* Skip verify of software_single_step, has predicate.  */
   /* Skip verify of single_step_through_delay, has predicate.  */
   /* Skip verify of print_insn, invalid_p == 0 */
@@ -3209,6 +3208,7 @@  int
 gdbarch_significant_addr_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
+  /* Skip verify of significant_addr_bit, invalid_p == 0 */
   if (gdbarch_debug >= 2)
     fprintf_unfiltered (gdb_stdlog, "gdbarch_significant_addr_bit called\n");
   return gdbarch->significant_addr_bit;
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 7330430..0a23b1e 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -622,7 +622,7 @@  m;CORE_ADDR;addr_bits_remove;CORE_ADDR addr;addr;;core_addr_identity;;0
 # For example, on AArch64, the top bits of an address known as the "tag"
 # are ignored by the kernel, the hardware, etc. and can be regarded as
 # additional data associated with the address.
-v;int;significant_addr_bit;;;;;gdbarch_addr_bit (gdbarch);
+v;int;significant_addr_bit;;;;;;0
 
 # FIXME/cagney/2001-01-18: This should be split in two.  A target method that
 # indicates if the target needs software single step.  An ISA method to
diff --git a/gdb/utils.c b/gdb/utils.c
index a2e933b..fe9a674 100644
--- a/gdb/utils.c
+++ b/gdb/utils.c
@@ -2708,10 +2708,11 @@  address_significant (gdbarch *gdbarch, CORE_ADDR addr)
   /* Clear insignificant bits of a target address and sign extend resulting
      address, avoiding shifts larger or equal than the width of a CORE_ADDR.
      The local variable ADDR_BIT stops the compiler reporting a shift overflow
-     when it won't occur.  */
+     when it won't occur.  Skip updating of target address if current target
+     has not set gdbarch significant_addr_bit.  */
   int addr_bit = gdbarch_significant_addr_bit (gdbarch);
 
-  if (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT))
+  if (addr_bit && (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT)))
     {
       CORE_ADDR sign = (CORE_ADDR) 1 << (addr_bit - 1);
       addr &= ((CORE_ADDR) 1 << addr_bit) - 1;