[2/6] qemuppc/ppc7400: Drop disabling spe

Message ID 8caf9a4387f6e45894e8dab673efb8cb997580c2.1527656441.git.raj.khem@gmail.com
State New
Headers show
Series
  • Add GCC-8 and make it default
Related show

Commit Message

Khem Raj May 30, 2018, 5:04 a.m.
gcc8 has separated spe backend from usual rs6000 backend for ppc
which means when we can non longer mix spe and non-spe configs for
gcc machines as we use to be able to do until gcc7.

If we need to enable spe we will need *-*-*spe* in tuple which we
already get for spe enabled tunes

Signed-off-by: Khem Raj <raj.khem@gmail.com>

Signed-off-by: Ross Burton <ross.burton@intel.com>

---
 meta/conf/machine/include/tune-ppc7400.inc | 2 +-
 meta/conf/machine/qemuppc.conf             | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

-- 
2.17.0

-- 
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Patch

diff --git a/meta/conf/machine/include/tune-ppc7400.inc b/meta/conf/machine/include/tune-ppc7400.inc
index 425e8bd215..8bfda56c25 100644
--- a/meta/conf/machine/include/tune-ppc7400.inc
+++ b/meta/conf/machine/include/tune-ppc7400.inc
@@ -3,7 +3,7 @@  DEFAULTTUNE ?= "ppc7400"
 require conf/machine/include/powerpc/arch-powerpc.inc
 
 TUNEVALID[ppc7400] = "Enable ppc7400 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'ppc7400', ' -mcpu=7400 -mno-spe', '', d)}"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'ppc7400', ' -mcpu=7400', '', d)}"
 
 AVAILTUNES += "ppc7400"
 TUNE_FEATURES_tune-ppc7400 = "m32 fpu-hard ppc7400 altivec"
diff --git a/meta/conf/machine/qemuppc.conf b/meta/conf/machine/qemuppc.conf
index 537b2f6774..f1e551584a 100644
--- a/meta/conf/machine/qemuppc.conf
+++ b/meta/conf/machine/qemuppc.conf
@@ -5,8 +5,6 @@ 
 require conf/machine/include/qemu.inc
 require conf/machine/include/tune-ppc7400.inc
 
-TARGET_CC_KERNEL_ARCH = "-mno-spe"
-
 KERNEL_IMAGETYPE = "vmlinux"
 
 SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1"