diff mbox series

[6/6] hw/char/parallel: Convert away from old_mmio

Message ID 20180601141223.26630-7-peter.maydell@linaro.org
State Superseded
Headers show
Series More conversions away from old_mmio | expand

Commit Message

Peter Maydell June 1, 2018, 2:12 p.m. UTC 
Convert the parallel device away from using the old_mmio field
of MemoryRegionOps. This change only affects the memory-mapped
variant, which is used by the MIPS Jazz boards 'magnum' and 'pica61'.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 hw/char/parallel.c | 50 ++++++++++------------------------------------
 1 file changed, 11 insertions(+), 39 deletions(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé June 11, 2018, 3:24 p.m. UTC | #1 
On 06/01/2018 11:12 AM, Peter Maydell wrote:
> Convert the parallel device away from using the old_mmio field

> of MemoryRegionOps. This change only affects the memory-mapped

> variant, which is used by the MIPS Jazz boards 'magnum' and 'pica61'.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


> ---

>  hw/char/parallel.c | 50 ++++++++++------------------------------------

>  1 file changed, 11 insertions(+), 39 deletions(-)

> 

> diff --git a/hw/char/parallel.c b/hw/char/parallel.c

> index 1542d62201..35748e6c1b 100644

> --- a/hw/char/parallel.c

> +++ b/hw/char/parallel.c

> @@ -554,56 +554,28 @@ static void parallel_isa_realizefn(DeviceState *dev, Error **errp)

>  }

>  

>  /* Memory mapped interface */

> -static uint32_t parallel_mm_readb (void *opaque, hwaddr addr)

> +static uint64_t parallel_mm_readfn(void *opaque, hwaddr addr, unsigned size)

>  {

>      ParallelState *s = opaque;

>  

> -    return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFF;

> +    return parallel_ioport_read_sw(s, addr >> s->it_shift) &

> +        MAKE_64BIT_MASK(0, size * 8);

>  }

>  

> -static void parallel_mm_writeb (void *opaque,

> -                                hwaddr addr, uint32_t value)

> +static void parallel_mm_writefn(void *opaque, hwaddr addr,

> +                                uint64_t value, unsigned size)

>  {

>      ParallelState *s = opaque;

>  

> -    parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFF);

> -}

> -

> -static uint32_t parallel_mm_readw (void *opaque, hwaddr addr)

> -{

> -    ParallelState *s = opaque;

> -

> -    return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFFFF;

> -}

> -

> -static void parallel_mm_writew (void *opaque,

> -                                hwaddr addr, uint32_t value)

> -{

> -    ParallelState *s = opaque;

> -

> -    parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFFFF);

> -}

> -

> -static uint32_t parallel_mm_readl (void *opaque, hwaddr addr)

> -{

> -    ParallelState *s = opaque;

> -

> -    return parallel_ioport_read_sw(s, addr >> s->it_shift);

> -}

> -

> -static void parallel_mm_writel (void *opaque,

> -                                hwaddr addr, uint32_t value)

> -{

> -    ParallelState *s = opaque;

> -

> -    parallel_ioport_write_sw(s, addr >> s->it_shift, value);

> +    parallel_ioport_write_sw(s, addr >> s->it_shift,

> +                             value & MAKE_64BIT_MASK(0, size * 8));

>  }

>  

>  static const MemoryRegionOps parallel_mm_ops = {

> -    .old_mmio = {

> -        .read = { parallel_mm_readb, parallel_mm_readw, parallel_mm_readl },

> -        .write = { parallel_mm_writeb, parallel_mm_writew, parallel_mm_writel },

> -    },

> +    .read = parallel_mm_readfn,

> +    .write = parallel_mm_writefn,

> +    .valid.min_access_size = 1,

> +    .valid.max_access_size = 4,

>      .endianness = DEVICE_NATIVE_ENDIAN,

>  };

>  

>
diff mbox series

Patch

diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index 1542d62201..35748e6c1b 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -554,56 +554,28 @@  static void parallel_isa_realizefn(DeviceState *dev, Error **errp)
 }
 
 /* Memory mapped interface */
-static uint32_t parallel_mm_readb (void *opaque, hwaddr addr)
+static uint64_t parallel_mm_readfn(void *opaque, hwaddr addr, unsigned size)
 {
     ParallelState *s = opaque;
 
-    return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFF;
+    return parallel_ioport_read_sw(s, addr >> s->it_shift) &
+        MAKE_64BIT_MASK(0, size * 8);
 }
 
-static void parallel_mm_writeb (void *opaque,
-                                hwaddr addr, uint32_t value)
+static void parallel_mm_writefn(void *opaque, hwaddr addr,
+                                uint64_t value, unsigned size)
 {
     ParallelState *s = opaque;
 
-    parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFF);
-}
-
-static uint32_t parallel_mm_readw (void *opaque, hwaddr addr)
-{
-    ParallelState *s = opaque;
-
-    return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFFFF;
-}
-
-static void parallel_mm_writew (void *opaque,
-                                hwaddr addr, uint32_t value)
-{
-    ParallelState *s = opaque;
-
-    parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static uint32_t parallel_mm_readl (void *opaque, hwaddr addr)
-{
-    ParallelState *s = opaque;
-
-    return parallel_ioport_read_sw(s, addr >> s->it_shift);
-}
-
-static void parallel_mm_writel (void *opaque,
-                                hwaddr addr, uint32_t value)
-{
-    ParallelState *s = opaque;
-
-    parallel_ioport_write_sw(s, addr >> s->it_shift, value);
+    parallel_ioport_write_sw(s, addr >> s->it_shift,
+                             value & MAKE_64BIT_MASK(0, size * 8));
 }
 
 static const MemoryRegionOps parallel_mm_ops = {
-    .old_mmio = {
-        .read = { parallel_mm_readb, parallel_mm_readw, parallel_mm_readl },
-        .write = { parallel_mm_writeb, parallel_mm_writew, parallel_mm_writel },
-    },
+    .read = parallel_mm_readfn,
+    .write = parallel_mm_writefn,
+    .valid.min_access_size = 1,
+    .valid.max_access_size = 4,
     .endianness = DEVICE_NATIVE_ENDIAN,
 };