From patchwork Fri Jun 1 14:12:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 137533 Delivered-To: patches@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp992006lji; Fri, 1 Jun 2018 07:12:29 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLkbzzP4NUjYgDxRaRkmLgia0pCSMgQQ+bh0j2CxFICHdYRKLBNz5aUHA8GfhOPbDF6A/T5 X-Received: by 2002:a63:8a4a:: with SMTP id y71-v6mr8765129pgd.291.1527862349197; Fri, 01 Jun 2018 07:12:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527862349; cv=none; d=google.com; s=arc-20160816; b=mVfpV+1Cr0CtQ1kFV5IgPXe100mR0oKf/xx5DRfzo3RTyRbmNnMQPh+oEyWXmhR74X UVhpYfM56S+cxjQGT9bt6oaxdSnBZFBJikp86dVm8h5Zn4CrBpqq5N9YscbVVATpyT95 DqYIwe/m+bOH78Now+fwpdYXFyt72KjBWjdec+GJlW0Q1yY/aZTWD6EvHn8jUSTWX/q9 Cy4euytmqziERn6Du8/oQf/Jv0tWM17fCMSXdZR2L565+TVJevvOkvuElhjvmcbVjFiX HjqYC70iPtd30UnY7fiT+ROg85KL9xcCgnf5vgfSrGtF++O4WAP/TKY4BhzjIr/hYPmy OADA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=WA714iFzBPdXYQ54fVa7m4yRaYKIfjIMUvvDplTPo9Y=; b=NZY4kZDldYOJ5zwBco+NXPGk2oKp/Ja05VPztmPqP3k7pnzZovYVFKt5PmeGrcbET6 aQMH9naQlYn8UnlrlwUE1IBhZxVYzRRV66c32vTxPzuXV8bH7D87oXTKZkxT4lBcyZaZ WaXTH/8uSxY7U2YsriPNfv6tXmi/+h2ii27+0iXAz/2EU81oVEzWMn2UTyQu7kVW1yIQ 6bYEtwychJkj/FRuSNtGh8QADYk9L5el05K8GenBpA7/viEk1O4NkCpgyuN7++I6clS0 7a2FEqnko2cmhK+vfA9v8IQA+LpKDOsqcnDfHTV4Y7mYXdtZD+x20VZPStTEOGOXZjnH DHhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id y13-v6si1889841pfc.302.2018.06.01.07.12.28 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Jun 2018 07:12:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fOkn4-00042r-Ox; Fri, 01 Jun 2018 15:12:26 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Kevin Wolf , Max Reitz , "Michael S. Tsirkin" , Paolo Bonzini , Thomas Huth , Aurelien Jarno , qemu-block@nongnu.org, Yongbok Kim Subject: [PATCH 3/6] hw/block/pflash_cfi02: Convert away from old_mmio Date: Fri, 1 Jun 2018 15:12:20 +0100 Message-Id: <20180601141223.26630-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180601141223.26630-1-peter.maydell@linaro.org> References: <20180601141223.26630-1-peter.maydell@linaro.org> Convert the pflash_cfi02 device away from using the old_mmio field of MemoryRegionOps. Signed-off-by: Peter Maydell --- hw/block/pflash_cfi02.c | 97 ++++++++--------------------------------- 1 file changed, 18 insertions(+), 79 deletions(-) -- 2.17.1 Acked-by: Max Reitz Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 75d1ae1026..84d4584100 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -494,102 +494,41 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, pfl->cmd = 0; } - -static uint32_t pflash_readb_be(void *opaque, hwaddr addr) +static uint64_t pflash_be_readfn(void *opaque, hwaddr addr, unsigned size) { - return pflash_read(opaque, addr, 1, 1); + return pflash_read(opaque, addr, size, 1); } -static uint32_t pflash_readb_le(void *opaque, hwaddr addr) +static void pflash_be_writefn(void *opaque, hwaddr addr, + uint64_t value, unsigned size) { - return pflash_read(opaque, addr, 1, 0); + pflash_write(opaque, addr, value, size, 1); } -static uint32_t pflash_readw_be(void *opaque, hwaddr addr) +static uint64_t pflash_le_readfn(void *opaque, hwaddr addr, unsigned size) { - pflash_t *pfl = opaque; - - return pflash_read(pfl, addr, 2, 1); + return pflash_read(opaque, addr, size, 0); } -static uint32_t pflash_readw_le(void *opaque, hwaddr addr) +static void pflash_le_writefn(void *opaque, hwaddr addr, + uint64_t value, unsigned size) { - pflash_t *pfl = opaque; - - return pflash_read(pfl, addr, 2, 0); -} - -static uint32_t pflash_readl_be(void *opaque, hwaddr addr) -{ - pflash_t *pfl = opaque; - - return pflash_read(pfl, addr, 4, 1); -} - -static uint32_t pflash_readl_le(void *opaque, hwaddr addr) -{ - pflash_t *pfl = opaque; - - return pflash_read(pfl, addr, 4, 0); -} - -static void pflash_writeb_be(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_write(opaque, addr, value, 1, 1); -} - -static void pflash_writeb_le(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_write(opaque, addr, value, 1, 0); -} - -static void pflash_writew_be(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_t *pfl = opaque; - - pflash_write(pfl, addr, value, 2, 1); -} - -static void pflash_writew_le(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_t *pfl = opaque; - - pflash_write(pfl, addr, value, 2, 0); -} - -static void pflash_writel_be(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_t *pfl = opaque; - - pflash_write(pfl, addr, value, 4, 1); -} - -static void pflash_writel_le(void *opaque, hwaddr addr, - uint32_t value) -{ - pflash_t *pfl = opaque; - - pflash_write(pfl, addr, value, 4, 0); + pflash_write(opaque, addr, value, size, 0); } static const MemoryRegionOps pflash_cfi02_ops_be = { - .old_mmio = { - .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, }, - .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, }, - }, + .read = pflash_be_readfn, + .write = pflash_be_writefn, + .valid.min_access_size = 1, + .valid.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, }; static const MemoryRegionOps pflash_cfi02_ops_le = { - .old_mmio = { - .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, }, - .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, }, - }, + .read = pflash_le_readfn, + .write = pflash_le_writefn, + .valid.min_access_size = 1, + .valid.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, };