From patchwork Fri Jun 1 14:12:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 137534 Delivered-To: patches@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp992051lji; Fri, 1 Jun 2018 07:12:30 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKhJ3pej95v5S3UjX3qyXFgXyawdIhStPo6cN9EdnigmK3mIMNL656fUsBagRcOUhsp1rri X-Received: by 2002:a17:902:bd96:: with SMTP id q22-v6mr660502pls.247.1527862350754; Fri, 01 Jun 2018 07:12:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527862350; cv=none; d=google.com; s=arc-20160816; b=C7pNj7FHBnDRMCixtugZsywZgCXLFBlsGQjUPLO8e1Hi76Y7JYC/ixf9HpfF9Inmvv tItUG7u9WUbPWaZ3T4S25HTP9p7ekCRiRdwL0bFw8SHFU66XMsqbeDMutQ5bqu/+f1Ct SkoViLSQxTp3ksrW0o0uM4svYkcJyU2iXU6vXzehxlgxhw0x/10LT+py99f1C/ltz3nW 8dC8bIEZ9t4cP+Hhy24U6zBskH+SebmvLpjeg1arHAjmrqNTTzNe+7AHIowrJXrDZWEZ /IBIt2iRjLRoBo8/c0iw8VIiGeS9/KNUEhGQKg0gOPrsKCW8QWqQKrQDRe30gVkLxUFA R8Cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=mPbGgI8gf7FvaAtBqgUaBbD3XkVaUMD3dubgz7VrptY=; b=yTkYC5dzaqeUFOyZXpyC0yStBSuLF2h205kkXHRaJzZ3u1MrOTC69uINkhcAZ/Xie5 WV9xXV7h8gUXi/XuNIsvx/c7nfuVmyBkYciyiaqrkpYTWcVPxytsaiibwinddZ8jleyy 7gHfGajLN9bYASYPk5ZLVBc2IDecr8k/rqS0aRomlOwPjVIOieeNcBvUZpOq/kZ2hSsK L+H8E54SJJduRUMtDSwxkALpIShjBnknEz9cOMfUo5EF8GQu+Lf4fpjFUbJ6Nicsikbt /yZcPOC8Biv1W7BGXjyja5Srb7ycPuZR/Lzmz67luNP/bDM/eTne59Ih2sTOpWEu+t/E TH7g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id e9-v6si1575622pgo.397.2018.06.01.07.12.29 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Jun 2018 07:12:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fOkn3-00042K-CC; Fri, 01 Jun 2018 15:12:25 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Kevin Wolf , Max Reitz , "Michael S. Tsirkin" , Paolo Bonzini , Thomas Huth , Aurelien Jarno , qemu-block@nongnu.org, Yongbok Kim Subject: [PATCH 1/6] hw/sh/sh7750: Convert away from old_mmio Date: Fri, 1 Jun 2018 15:12:18 +0100 Message-Id: <20180601141223.26630-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180601141223.26630-1-peter.maydell@linaro.org> References: <20180601141223.26630-1-peter.maydell@linaro.org> Convert the sh7750 device away from using the old_mmio field of MemoryRegionOps. This device is used by the sh4 r2d board. Signed-off-by: Peter Maydell --- hw/sh4/sh7750.c | 44 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 8 deletions(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c index 5a7d47d31e..b932f33409 100644 --- a/hw/sh4/sh7750.c +++ b/hw/sh4/sh7750.c @@ -451,15 +451,43 @@ static void sh7750_mem_writel(void *opaque, hwaddr addr, } } +static uint64_t sh7750_mem_readfn(void *opaque, hwaddr addr, unsigned size) +{ + switch (size) { + case 1: + return sh7750_mem_readb(opaque, addr); + case 2: + return sh7750_mem_readw(opaque, addr); + case 4: + return sh7750_mem_readl(opaque, addr); + default: + g_assert_not_reached(); + } +} + +static void sh7750_mem_writefn(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + switch (size) { + case 1: + sh7750_mem_writeb(opaque, addr, value); + break; + case 2: + sh7750_mem_writew(opaque, addr, value); + break; + case 4: + sh7750_mem_writel(opaque, addr, value); + break; + default: + g_assert_not_reached(); + } +} + static const MemoryRegionOps sh7750_mem_ops = { - .old_mmio = { - .read = {sh7750_mem_readb, - sh7750_mem_readw, - sh7750_mem_readl }, - .write = {sh7750_mem_writeb, - sh7750_mem_writew, - sh7750_mem_writel }, - }, + .read = sh7750_mem_readfn, + .write = sh7750_mem_writefn, + .valid.min_access_size = 1, + .valid.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, };