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[2.15.165.91]) by smtp.gmail.com with ESMTPSA id v14-v6sm27935985wro.33.2018.06.07.08.08.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jun 2018 08:08:24 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 7 Jun 2018 17:08:18 +0200 Message-Id: <20180607150818.14393-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180607150818.14393-1-ard.biesheuvel@linaro.org> References: <20180607150818.14393-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 2/2] Silicon/NorFlashSynQuacerLib: describe entire firmware region as FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In order to allow for more flexibility when updating parts of the firmware via capsule update, expand the description of the code FV to cover the entire 4 MB region at the base of the NOR flash. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c index 816d8ba33f8c..357082c3d903 100644 --- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c @@ -23,8 +23,9 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = { { // UEFI code region SYNQUACER_SPI_NOR_BASE, // device base - FixedPcdGet64 (PcdFdBaseAddress), // region base - FixedPcdGet32 (PcdFdSize), // region size + SYNQUACER_SPI_NOR_BASE, // region base + FixedPcdGet32 (PcdFlashNvStorageVariableBase) - + SYNQUACER_SPI_NOR_BASE, // region size SIZE_64KB, // block size { 0x19c118b0, 0xc423, 0x42be, { 0xb8, 0x0f, 0x70, 0x6f, 0x1f, 0xcb, 0x59, 0x9a }