From patchwork Mon Jun 11 17:10:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 138263 Delivered-To: patches@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp4300869lji; Mon, 11 Jun 2018 10:10:13 -0700 (PDT) X-Google-Smtp-Source: ADUXVKK178lpDK91pZeb8l10qfa+SdSn8JEXj4K4z1EA3vZHY6FcT8KVhYXnrA5uTUVftb2m4azc X-Received: by 2002:a5d:4b4b:: with SMTP id w11-v6mr11724wrs.87.1528737013822; Mon, 11 Jun 2018 10:10:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528737013; cv=none; d=google.com; s=arc-20160816; b=xYRmCenyWptyJG30566mjRr9k/wXlon04bSHdaAwHAStva9uF8qrWXPzaC8xnh333Z pP2cQFR2rwz9zelgA0NL6h+8WArEVfRRENXd5sPK9xUyCj69RqleHKbJmi2Pq+OpBrix B5EmdJxPMSnPXoDWx03Xr7ur9vV9UDP15tcCRAMvUhFEJ/tk3SgXyVks3I3b8RxpfJGe tUP0L8glxLh2ktkcYnvemCudCMdIcOZDv3B2qO4PXvTnu/DH2TILgdZcS5fmyl1pG2df I4qQqAu1rUh7uDqRcIa+gSF6KUjpgyrV469WFyZoNXJQEUOW/QlAHLihHoMbfszucfdB eXqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ldLhSXSdL2/zIgbbBQx0AeI/BJvYdFXG7xMBW+/XF3w=; b=AcUeRCzhXddrKQGU4lHd0qijkSNc6pAnsqt6FOAU192zOcCrwM42kfPAmR0VGdj6CF rB4Ctze60sKnyQfVLgazUwQPdGViTfmWn5U29h4Ky172ec3zKK1JIRgxgtKxI88JsK/t jJbE6puYq+qlIVYeaqWtbO23APIi+cjnpgUlrfVCEtc0oKdqZZCW15uqPFylBfaIUEvQ 1HN/PqFS5woCwlfjVIUsl0wl2muUBXh8F+t/ZmbyaQOSCod+aaXBblGUJ6t4BnfUF+0I /SW7C2BDGwh4zMn9gil4uve/S/CarBENutRfH1njG7kkOb9arqnJuSJoaKSRq515RZlK 3zgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id k8-v6si14651104wrk.440.2018.06.11.10.10.13 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Jun 2018 10:10:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fSQKb-0007Ea-9v; Mon, 11 Jun 2018 18:10:13 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , Paolo Bonzini Subject: [PATCH 1/3] bswap: Add new stn_*_p() and ldn_*_p() memory access functions Date: Mon, 11 Jun 2018 18:10:05 +0100 Message-Id: <20180611171007.4165-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180611171007.4165-1-peter.maydell@linaro.org> References: <20180611171007.4165-1-peter.maydell@linaro.org> There's a common pattern in QEMU where a function needs to perform a data load or store of an N byte integer in a particular endianness. At the moment this is handled by doing a switch() on the size and calling the appropriate ld*_p or st*_p function for each size. Provide a new family of functions ldn_*_p() and stn_*_p() which take the size as an argument and do the switch() themselves. Signed-off-by: Peter Maydell --- include/exec/cpu-all.h | 4 +++ include/qemu/bswap.h | 52 +++++++++++++++++++++++++++++++++++++ docs/devel/loads-stores.rst | 15 +++++++++++ 3 files changed, 71 insertions(+) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index a635f532f97..07ec3808342 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -133,6 +133,8 @@ static inline void tswap64s(uint64_t *s) #define stq_p(p, v) stq_be_p(p, v) #define stfl_p(p, v) stfl_be_p(p, v) #define stfq_p(p, v) stfq_be_p(p, v) +#define ldn_p(p, sz ldn_be_p(p, sz) +#define stn_p(p, sz, v) stn_be_p(p, sz, v) #else #define lduw_p(p) lduw_le_p(p) #define ldsw_p(p) ldsw_le_p(p) @@ -145,6 +147,8 @@ static inline void tswap64s(uint64_t *s) #define stq_p(p, v) stq_le_p(p, v) #define stfl_p(p, v) stfl_le_p(p, v) #define stfq_p(p, v) stfq_le_p(p, v) +#define ldn_p(p, sz) ldn_le_p(p, sz) +#define stn_p(p, sz, v) stn_le_p(p, sz, v) #endif /* MMU memory access macros */ diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 3f28f661b15..a684c1a7a29 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -290,6 +290,15 @@ typedef union { * For accessors that take a guest address rather than a * host address, see the cpu_{ld,st}_* accessors defined in * cpu_ldst.h. + * + * For cases where the size to be used is not fixed at compile time, + * there are + * stn{endian}_p(ptr, sz, val) + * which stores @val to @ptr as an @endian-order number @sz bytes in size + * and + * ldn{endian}_p(ptr, sz) + * which loads @sz bytes from @ptr as an unsigned @endian-order number + * and returns it in a uint64_t. */ static inline int ldub_p(const void *ptr) @@ -495,6 +504,49 @@ static inline unsigned long leul_to_cpu(unsigned long v) #endif } +/* Store v to p as a sz byte value in host order */ +#define DO_STN_LDN_P(END) \ + static inline void stn_## END ## _p(void *ptr, int sz, uint64_t v) \ + { \ + switch (sz) { \ + case 1: \ + stb_p(ptr, v); \ + break; \ + case 2: \ + stw_ ## END ## _p(ptr, v); \ + break; \ + case 4: \ + stl_ ## END ## _p(ptr, v); \ + break; \ + case 8: \ + stq_ ## END ## _p(ptr, v); \ + break; \ + default: \ + g_assert_not_reached(); \ + } \ + } \ + static inline uint64_t ldn_## END ## _p(const void *ptr, int sz) \ + { \ + switch (sz) { \ + case 1: \ + return ldub_p(ptr); \ + case 2: \ + return lduw_ ## END ## _p(ptr); \ + case 4: \ + return (uint32_t)ldl_ ## END ## _p(ptr); \ + case 8: \ + return ldq_ ## END ## _p(ptr); \ + default: \ + g_assert_not_reached(); \ + } \ + } + +DO_STN_LDN_P(he) +DO_STN_LDN_P(le) +DO_STN_LDN_P(be) + +#undef DO_STN_LDN_P + #undef le_bswap #undef be_bswap #undef le_bswaps diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 6a990cc2438..57d8c524bfe 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -53,9 +53,24 @@ The ``_{endian}`` infix is omitted for target-endian accesses. The target endian accessors are only available to source files which are built per-target. +There are also functions which take the size as an argument: + +load: ``ldn{endian}_p(ptr, sz)`` + +which performs an unsigned load of ``sz`` bytes from ``ptr`` +as an ``{endian}`` order value and returns it in a uint64_t. + +store: ``stn{endian}_p(ptr, sz, val)`` + +which stores ``val`` to ``ptr`` as an ``{endian}`` order value +of size ``sz`` bytes. + + Regexes for git grep - ``\`` - ``\`` + - ``\`` + - ``\`` ``cpu_{ld,st}_*`` ~~~~~~~~~~~~~~~~~