From patchwork Fri Jun 15 01:18:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 138639 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp215929lji; Thu, 14 Jun 2018 18:20:42 -0700 (PDT) X-Google-Smtp-Source: ADUXVKK4RCAKmax3a+n/LeNJK9XT9iycrb5DBIbspAaD/ZOqovKieNaRHgBnAFy1icunXXJxduHs X-Received: by 2002:a17:902:5e3:: with SMTP id f90-v6mr5518977plf.175.1529025641996; Thu, 14 Jun 2018 18:20:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529025641; cv=none; d=google.com; s=arc-20160816; b=0JGxWX3BfvkZhiFCR14WvEN7yGjxWAkDkpajHIG4onWmjtETLughRcl1xfDSY/Jjac pCUL7lu6/P3cbAFl8jE38efDqj91zOBKYwtpzWeF9D34j91mhCTOzz/vUIcQa4eYbjlO SL66toGvJCM5fx2quVeCBl0+r671o9659GCe1fVbFfNniauWrS3tUVx8U/1+vt/CHLkz /vm4O1Ck3fTnX31yK/qB4yeNvGc20uUkkzJJFa3hbi3cbPAZ7uLneekDTJlmvWornP3D V+E1s6JbpAOpwB+P+0t5xPepsoYu4ExsZa1eeeMRJw7WCb4aq4CNCPOEdouLFR3qNeVT tZiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:dkim-filter:dkim-signature :arc-authentication-results; bh=ppKHuHVfXNoa3OUHZNO99R10N5zcufguDG5GhGdxvWw=; b=XmXdae3bdmNSPoK6jo8qDFFHJYLGmENoSrye1Vb4yojjhmhP7i4K2LEU9/aOAFTIJq O3V8gRQXhvD4kh/b7IlL2e82iyU8C3rQ/DsXBq0f6+X9j/Wvw39miURCKAPRVOD9DdS5 Bs1u8bQ1uUl2hgjJasLf0hjb//iXAhyyTgOfMauGsBD92DA3dmI5361/hOYfmFe/G80t qsAvC4PhKoHc+l4KdbcOmErdPU778RtPAEhjXS3mEDWx+Kc+ya/+eFmWGS8pMclh2OKM HSkOUJOftFC//08oXOrMGpan88W34MpeeOyxOX5/7nHrggIzLO72W7P43PPS4yeEXp+R 1Y2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=nDmyDUbq; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=iH48xH+G; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org" Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2607:7c80:54:e::133]) by mx.google.com with ESMTPS id a5-v6si5558469pgu.119.2018.06.14.18.20.41 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Jun 2018 18:20:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; Authentication-Results: mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20170209 header.b=nDmyDUbq; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=iH48xH+G; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=ppKHuHVfXNoa3OUHZNO99R10N5zcufguDG5GhGdxvWw=; b=nDmyDUbq9cpZ041fY9O4oCimlE r1IDEtJvbx+9MCKoeJfC/r2ofZ7v83eBz7uHwbGPdf5chDUCoYkYSMrg/ffoKZ0Gdq+bcdnwBuJ1w WI5UIE125IfnUMsl4/oRwMLzZGcj0SBRC0W7NzN8fOPuTwKt/qvHNAkKYVlo3+p79SonvkYm//IKq F5EW+aASQPkpZg8CLoQdLPLVr1MQaGwIfenWJaUo0IvgR25wtj49eASia3usbFdiWMt4Sb9OduNuG OPU4JaYT9qgfLjTRr6tl9NhIuzEjcXlZdjBT0h6On6QJHm8KHK1mzmxl28UQDFAXVbvqGcl5eWJfp VQtfMASw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fTdPc-0004B6-IP; Fri, 15 Jun 2018 01:20:24 +0000 Received: from conuserg-08.nifty.com ([210.131.2.75]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fTdOj-0002tR-1v for linux-mtd@lists.infradead.org; Fri, 15 Jun 2018 01:19:33 +0000 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id w5F1IuML005465; Fri, 15 Jun 2018 10:18:57 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com w5F1IuML005465 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1529025538; bh=KjxQmYfxbZS/rwsDSNxCQhfsTDo8tveyZkb2Uja5cMM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iH48xH+GCYCJ4vqPNITXEKazv7LZ2NtNF+2ZF3PaUXRwRQhtmAGBc3L7hnRFht3ki REchyykimVWZJ9fUj3Ruzvr1AhTPxiu/LZFKTigOVka8PL3dpu769C3mxdiDscWFvn izFyFxQiMrusqlXH8xf1BcdeRYKHe4q/FehKprbDS1GH2oyg0JB9mECqGCxyLDQnch EJ8GFjtIQ5AwLQCrOXyfQqmgczKLtyC2ea7rNPmCUmvcyoenQGBWwOLvXd2cC3o11K lH5HdRU/cgypk9dpYt485sOwI4rV71tV9I6ubgJEtMZV0GgYNPbcdRSuJbEX5J72VS AYDdXqTE9ZwvQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org, Boris Brezillon Subject: [PATCH v3 1/3] mtd: rawnand: denali_dt: add more clocks based on IP datasheet Date: Fri, 15 Jun 2018 10:18:50 +0900 Message-Id: <1529025532-22087-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529025532-22087-1-git-send-email-yamada.masahiro@socionext.com> References: <1529025532-22087-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180614_181929_476742_49704A31 X-CRM114-Status: GOOD ( 19.25 ) X-Spam-Score: 1.0 (+) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (1.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [210.131.2.75 listed in list.dnswl.org] 1.0 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail) 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kbuild@vger.kernel.org, Richard Weinberger , linux-kernel@vger.kernel.org, "linux-stable #4 . 14+" , Masahiro Yamada , Rob Herring , Miquel Raynal , Brian Norris , David Woodhouse , Marek Vasut MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org According to the Denali User's Guide, this IP needs three clocks: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run Currently, denali_dt.c requires a single anonymous clock and its frequency. However, the driver needs to get the frequency of "clk_x" not "clk". This is confusing because people tend to assume the anonymous clock means the core clock. In fact, I got a report of SOCFPGA breakage because the timing parameters are calculated based on a wrong frequency. Instead of the cheesy implementation, the clocks in the real hardware should be represented in the driver and the DT-binding. However, adding new clocks would break the existing platforms. For the backward compatibility, the driver still accepts a single clock just as before. If clk_x is missing, clk_x_rate is set to a hardcoded value. This is fine for existing DT of Socionext UniPhier, and also fixes the issue of Altera (Intel) SOCFPGA because both platforms use 200 MHz for the bus interface clock. Fixes: 1bb88666775e ("mtd: nand: denali: handle timing parameters by setup_data_interface()") Cc: linux-stable #4.14+ Reported-by: Richard Weinberger Signed-off-by: Masahiro Yamada --- Changes in v3: - Change the patch order so that the bug-fix one comes the first Changes in v2: - Split patches into sensible chunks .../devicetree/bindings/mtd/denali-nand.txt | 5 +++ drivers/mtd/nand/raw/denali_dt.c | 49 ++++++++++++++++++++-- 2 files changed, 50 insertions(+), 4 deletions(-) -- 2.7.4 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 0ee8edb..f33da87 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -8,6 +8,9 @@ Required properties: - reg : should contain registers location and length for data and reg. - reg-names: Should contain the reg names "nand_data" and "denali_reg" - interrupts : The interrupt number. + - clocks: should contain phandle of the controller core clock, the bus + interface clock, and the ECC circuit clock. + - clock-names: should contain "nand", "nand_x", "ecc" Optional properties: - nand-ecc-step-size: see nand.txt for details. If present, the value must be @@ -31,5 +34,7 @@ nand: nand@ff900000 { compatible = "altr,socfpga-denali-nand"; reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; + clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; + clock-names = "nand", "nand_x", "ecc"; interrupts = <0 144 4>; }; diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index cfd33e6..ce6239d 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -27,7 +27,9 @@ struct denali_dt { struct denali_nand_info denali; - struct clk *clk; + struct clk *clk; /* core clock */ + struct clk *clk_x; /* bus interface clock */ + struct clk *clk_ecc; /* ECC circuit clock */ }; struct denali_dt_data { @@ -114,24 +116,61 @@ static int denali_dt_probe(struct platform_device *pdev) if (IS_ERR(denali->host)) return PTR_ERR(denali->host); - dt->clk = devm_clk_get(&pdev->dev, NULL); + /* + * A single anonymous clock is supported for the backward compatibility. + * New platforms should support all the named clocks. + */ + dt->clk = devm_clk_get(&pdev->dev, "nand"); + if (IS_ERR(dt->clk)) + dt->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dt->clk)) { dev_err(&pdev->dev, "no clk available\n"); return PTR_ERR(dt->clk); } + + dt->clk_x = devm_clk_get(&pdev->dev, "nand_x"); + if (IS_ERR(dt->clk_x)) + dt->clk_x = NULL; + + dt->clk_ecc = devm_clk_get(&pdev->dev, "ecc"); + if (IS_ERR(dt->clk_ecc)) + dt->clk_ecc = NULL; + ret = clk_prepare_enable(dt->clk); if (ret) return ret; - denali->clk_x_rate = clk_get_rate(dt->clk); + ret = clk_prepare_enable(dt->clk_x); + if (ret) + goto out_disable_clk; + + ret = clk_prepare_enable(dt->clk_ecc); + if (ret) + goto out_disable_clk_x; + + if (dt->clk_x) { + denali->clk_x_rate = clk_get_rate(dt->clk_x); + } else { + /* + * Hardcode the clock rates for the backward compatibility. + * This works for both SOCFPGA and UniPhier. + */ + dev_notice(&pdev->dev, + "necessary clock is missing. default clock rates are used.\n"); + denali->clk_x_rate = 200000000; + } ret = denali_init(denali); if (ret) - goto out_disable_clk; + goto out_disable_clk_ecc; platform_set_drvdata(pdev, dt); return 0; +out_disable_clk_ecc: + clk_disable_unprepare(dt->clk_ecc); +out_disable_clk_x: + clk_disable_unprepare(dt->clk_x); out_disable_clk: clk_disable_unprepare(dt->clk); @@ -143,6 +182,8 @@ static int denali_dt_remove(struct platform_device *pdev) struct denali_dt *dt = platform_get_drvdata(pdev); denali_remove(&dt->denali); + clk_disable_unprepare(dt->clk_ecc); + clk_disable_unprepare(dt->clk_x); clk_disable_unprepare(dt->clk); return 0;