diff mbox series

[v2,1/2] dt-bindings: rng: Add new compatible qcom,prng-v2

Message ID 20180619095430.26358-2-vkoul@kernel.org
State New
Headers show
Series [v2,1/2] dt-bindings: rng: Add new compatible qcom,prng-v2 | expand

Commit Message

Vinod Koul June 19, 2018, 9:54 a.m. UTC
Later qcom chips support v2 of the prng, so add new compatible
qcom,prng-v2 for this.

Signed-off-by: Vinod Koul <vkoul@kernel.org>

---

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
 Documentation/devicetree/bindings/rng/qcom,prng.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
2.14.4

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Comments

Rob Herring June 25, 2018, 7:06 p.m. UTC | #1
On Tue, Jun 19, 2018 at 03:24:29PM +0530, Vinod Koul wrote:
> Later qcom chips support v2 of the prng, so add new compatible

> qcom,prng-v2 for this.

> 

> Signed-off-by: Vinod Koul <vkoul@kernel.org>

> ---

> 

> Cc: Rob Herring <robh+dt@kernel.org>

> Cc: devicetree@vger.kernel.org

>  Documentation/devicetree/bindings/rng/qcom,prng.txt | 3 ++-

>  1 file changed, 2 insertions(+), 1 deletion(-)

> 

> diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt

> index 8e5853c2879b..03fd218bd21a 100644

> --- a/Documentation/devicetree/bindings/rng/qcom,prng.txt

> +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt

> @@ -2,7 +2,8 @@ Qualcomm MSM pseudo random number generator.

>  

>  Required properties:

>  

> -- compatible  : should be "qcom,prng"

> +- compatible  : should be "qcom,prng" for 8916 etc

> +              : should be "qcom,prng-v2" for 8996 and later


Either use SoC specific compatibles or convince me 'v2' is a meaningful 
and specific enough version. Some other QC IP has x.y.z versioning for 
example.

>  - reg         : specifies base physical address and size of the registers map

>  - clocks      : phandle to clock-controller plus clock-specifier pair

>  - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block

> -- 

> 2.14.4

> 

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Vinod Koul June 26, 2018, 3:27 p.m. UTC | #2
On 25-06-18, 13:06, Rob Herring wrote:
> On Tue, Jun 19, 2018 at 03:24:29PM +0530, Vinod Koul wrote:

> > Later qcom chips support v2 of the prng, so add new compatible

> > qcom,prng-v2 for this.

> > 

> > Signed-off-by: Vinod Koul <vkoul@kernel.org>

> > ---

> > 

> > Cc: Rob Herring <robh+dt@kernel.org>

> > Cc: devicetree@vger.kernel.org

> >  Documentation/devicetree/bindings/rng/qcom,prng.txt | 3 ++-

> >  1 file changed, 2 insertions(+), 1 deletion(-)

> > 

> > diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt

> > index 8e5853c2879b..03fd218bd21a 100644

> > --- a/Documentation/devicetree/bindings/rng/qcom,prng.txt

> > +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt

> > @@ -2,7 +2,8 @@ Qualcomm MSM pseudo random number generator.

> >  

> >  Required properties:

> >  

> > -- compatible  : should be "qcom,prng"

> > +- compatible  : should be "qcom,prng" for 8916 etc

> > +              : should be "qcom,prng-v2" for 8996 and later

> 

> Either use SoC specific compatibles or convince me 'v2' is a meaningful 

> and specific enough version. Some other QC IP has x.y.z versioning for 

> example.


The specs says QC RNG V2 :)

Said that Stephen suggested to make it qcom,prng-ee to point out that we
are pointing to an execution environment in the IP, so will do that
instead unless you have better idea

-- 
~Vinod
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diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt
index 8e5853c2879b..03fd218bd21a 100644
--- a/Documentation/devicetree/bindings/rng/qcom,prng.txt
+++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt
@@ -2,7 +2,8 @@  Qualcomm MSM pseudo random number generator.
 
 Required properties:
 
-- compatible  : should be "qcom,prng"
+- compatible  : should be "qcom,prng" for 8916 etc
+              : should be "qcom,prng-v2" for 8996 and later
 - reg         : specifies base physical address and size of the registers map
 - clocks      : phandle to clock-controller plus clock-specifier pair
 - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block