diff mbox series

[PATCHv4,08/18] atomics/generic: define atomic64_fetch_add_unless()

Message ID 20180621121321.4761-9-mark.rutland@arm.com
State Accepted
Commit 00b808ab79ead372daf1a0682d1ef271599c0b55
Headers show
Series atomics: API cleanups | expand

Commit Message

Mark Rutland June 21, 2018, 12:13 p.m. UTC 
As a step towards unifying the atomic/atomic64/atomic_long APIs, this
patch converts the generic implementation of atomic64_add_unless() into
a generic implementation of atomic64_fetch_add_unless().

A wrapper in <linux/atomic.h> will build atomic_add_unless() atop of
this, provided it is given a preprocessor definition.

No functional change is intended as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>

Reviewed-by: Will Deacon <will.deacon@arm.com>

Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
---
 include/asm-generic/atomic64.h |  3 ++-
 lib/atomic64.c                 | 12 ++++++------
 2 files changed, 8 insertions(+), 7 deletions(-)

-- 
2.11.0

Comments

Mark Rutland June 21, 2018, 12:21 p.m. UTC | #1 
On Thu, Jun 21, 2018 at 01:13:11PM +0100, Mark Rutland wrote:
> -	if (v->counter != u) {

> +	val = v->counter;

> +	if (val != u)

>  		v->counter += a;

> -		ret = true;

>  	}


Ugh, I thought I had fixed this up and removed the trailing brace.

This will break some 32-bit arches as-is.

Ingo, would you be hapyp to fix this up, or would you prefer that I fix
and resend?

Sorry about this.

Mark.
Ingo Molnar June 21, 2018, 12:26 p.m. UTC | #2 
* Mark Rutland <mark.rutland@arm.com> wrote:

> On Thu, Jun 21, 2018 at 01:13:11PM +0100, Mark Rutland wrote:

> > -	if (v->counter != u) {

> > +	val = v->counter;

> > +	if (val != u)

> >  		v->counter += a;

> > -		ret = true;

> >  	}

> 

> Ugh, I thought I had fixed this up and removed the trailing brace.

> 

> This will break some 32-bit arches as-is.

> 

> Ingo, would you be hapyp to fix this up, or would you prefer that I fix

> and resend?


I fixed it up, no need to resend unless I find other problems in testing.

> Sorry about this.


No problem!

Thanks,

	Ingo
diff mbox series

Patch

diff --git a/include/asm-generic/atomic64.h b/include/asm-generic/atomic64.h
index 5105275ac825..49460107b29a 100644
--- a/include/asm-generic/atomic64.h
+++ b/include/asm-generic/atomic64.h
@@ -53,7 +53,8 @@  ATOMIC64_OPS(xor)
 extern long long atomic64_dec_if_positive(atomic64_t *v);
 extern long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n);
 extern long long atomic64_xchg(atomic64_t *v, long long new);
-extern bool	 atomic64_add_unless(atomic64_t *v, long long a, long long u);
+extern long long atomic64_fetch_add_unless(atomic64_t *v, long long a, long long u);
+#define atomic64_fetch_add_unless atomic64_fetch_add_unless
 
 #define atomic64_add_negative(a, v)	(atomic64_add_return((a), (v)) < 0)
 #define atomic64_inc(v)			atomic64_add(1LL, (v))
diff --git a/lib/atomic64.c b/lib/atomic64.c
index 4230f4b8906c..16ac13113c8e 100644
--- a/lib/atomic64.c
+++ b/lib/atomic64.c
@@ -178,18 +178,18 @@  long long atomic64_xchg(atomic64_t *v, long long new)
 }
 EXPORT_SYMBOL(atomic64_xchg);
 
-bool atomic64_add_unless(atomic64_t *v, long long a, long long u)
+long long atomic64_fetch_add_unless(atomic64_t *v, long long a, long long u)
 {
 	unsigned long flags;
 	raw_spinlock_t *lock = lock_addr(v);
-	bool ret = false;
+	long long val;
 
 	raw_spin_lock_irqsave(lock, flags);
-	if (v->counter != u) {
+	val = v->counter;
+	if (val != u)
 		v->counter += a;
-		ret = true;
 	}
 	raw_spin_unlock_irqrestore(lock, flags);
-	return ret;
+	return val;
 }
-EXPORT_SYMBOL(atomic64_add_unless);
+EXPORT_SYMBOL(atomic64_fetch_add_unless);