diff mbox series

[v3,5/5] tests/tcg/aarch64: userspace system register test

Message ID 20180625160009.17437-6-alex.bennee@linaro.org
State New
Headers show
Series support reading some CPUID/CNT registers from user-space | expand

Commit Message

Alex Bennée June 25, 2018, 4 p.m. UTC
This tests a bunch of registers that the kernel allows userspace to
read including the CPUID registers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
 tests/tcg/aarch64/Makefile.target |  2 +-
 tests/tcg/aarch64/sysregs.c       | 99 +++++++++++++++++++++++++++++++
 2 files changed, 100 insertions(+), 1 deletion(-)
 create mode 100644 tests/tcg/aarch64/sysregs.c

-- 
2.17.1

Comments

Alex Bennée June 25, 2018, 8:51 p.m. UTC | #1
Alex Bennée <alex.bennee@linaro.org> writes:

> This tests a bunch of registers that the kernel allows userspace to

> read including the CPUID registers.

>

> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

> ---

>  tests/tcg/aarch64/Makefile.target |  2 +-

>  tests/tcg/aarch64/sysregs.c       | 99 +++++++++++++++++++++++++++++++

>  2 files changed, 100 insertions(+), 1 deletion(-)

>  create mode 100644 tests/tcg/aarch64/sysregs.c

>

> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target

> index 08c45b8470..cc1a7eb486 100644

> --- a/tests/tcg/aarch64/Makefile.target

> +++ b/tests/tcg/aarch64/Makefile.target

> @@ -7,7 +7,7 @@ VPATH 		+= $(AARCH64_SRC)

>

>  # we don't build any of the ARM tests

>  AARCH64_TESTS=$(filter-out $(ARM_TESTS), $(TESTS))

> -AARCH64_TESTS+=fcvt

> +AARCH64_TESTS+=fcvt sysregs

>  TESTS:=$(AARCH64_TESTS)

>

>  fcvt: LDFLAGS+=-lm

> diff --git a/tests/tcg/aarch64/sysregs.c b/tests/tcg/aarch64/sysregs.c

> new file mode 100644

> index 0000000000..177d1fe33b

> --- /dev/null

> +++ b/tests/tcg/aarch64/sysregs.c

> @@ -0,0 +1,99 @@

> +/*

> + * Check emulated system register access for linux-user mode.

> + *

> + * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt

> + */

> +

> +#include <asm/hwcap.h>

> +#include <stdio.h>

> +#include <sys/auxv.h>

> +#include <signal.h>

> +#include <string.h>

> +#include <stdbool.h>

> +

<snip>
> +

> +    /* when (getauxval(AT_HWCAP) & HWCAP_CPUID), since 4.11*/

> +    if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {

> +        printf("CPUID registers unavailable\n");

> +        return 1;

> +    } else {

> +        printf("Checking CPUID registers\n");

> +    }


Annoyingly this fails on qemu:debian-arm64-cross as it uses an older set
of headers than my desktop cross environment:

  aarch64-linux-gnu-gcc (Ubuntu/Linaro 7.3.0-16ubuntu3) 7.3.0

with the libc:

  Source: cross-toolchain-base (25ubuntu6)
  Version: 2.27-3ubuntu1cross1
  Provides: libc6-arm64-dcv1

So I'm thinking an #ifndef HWCAP_CPUID and define it would be acceptable
for a test case.

--
Alex Bennée
Richard Henderson June 27, 2018, 5:38 a.m. UTC | #2
On 06/25/2018 09:00 AM, Alex Bennée wrote:
> This tests a bunch of registers that the kernel allows userspace to

> read including the CPUID registers.

> 

> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

> ---

>  tests/tcg/aarch64/Makefile.target |  2 +-

>  tests/tcg/aarch64/sysregs.c       | 99 +++++++++++++++++++++++++++++++

>  2 files changed, 100 insertions(+), 1 deletion(-)

>  create mode 100644 tests/tcg/aarch64/sysregs.c


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 08c45b8470..cc1a7eb486 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -7,7 +7,7 @@  VPATH 		+= $(AARCH64_SRC)
 
 # we don't build any of the ARM tests
 AARCH64_TESTS=$(filter-out $(ARM_TESTS), $(TESTS))
-AARCH64_TESTS+=fcvt
+AARCH64_TESTS+=fcvt sysregs
 TESTS:=$(AARCH64_TESTS)
 
 fcvt: LDFLAGS+=-lm
diff --git a/tests/tcg/aarch64/sysregs.c b/tests/tcg/aarch64/sysregs.c
new file mode 100644
index 0000000000..177d1fe33b
--- /dev/null
+++ b/tests/tcg/aarch64/sysregs.c
@@ -0,0 +1,99 @@ 
+/*
+ * Check emulated system register access for linux-user mode.
+ *
+ * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
+ */
+
+#include <asm/hwcap.h>
+#include <stdio.h>
+#include <sys/auxv.h>
+#include <signal.h>
+#include <string.h>
+#include <stdbool.h>
+
+#define get_cpu_reg(id) ({                                      \
+            unsigned long __val = 0xdeadbeef;                   \
+            asm("mrs %0, "#id : "=r" (__val));                  \
+            printf("%-20s: 0x%016lx\n", #id, __val);            \
+        })
+
+bool should_fail;
+
+int should_fail_count;
+int should_not_fail_count;
+uintptr_t failed_pc[10];
+
+void sigill_handler(int signo, siginfo_t *si, void *data)
+{
+    ucontext_t *uc = (ucontext_t *)data;
+
+    if (should_fail) {
+        should_fail_count++;
+    } else {
+        uintptr_t pc = (uintptr_t) uc->uc_mcontext.pc;
+        failed_pc[should_not_fail_count++] =  pc;
+    }
+    uc->uc_mcontext.pc += 4;
+}
+
+int main(void)
+{
+    struct sigaction sa;
+
+    /* Hook in a SIGILL handler */
+    memset(&sa, 0, sizeof(struct sigaction));
+    sa.sa_flags = SA_SIGINFO;
+    sa.sa_sigaction = &sigill_handler;
+    sigemptyset(&sa.sa_mask);
+
+    if (sigaction(SIGILL, &sa, 0) != 0) {
+        perror("sigaction");
+        return 1;
+    }
+
+    /* since 4.12 */
+    printf("Checking CNT registers\n");
+
+    get_cpu_reg(ctr_el0);
+    get_cpu_reg(cntvct_el0);
+    get_cpu_reg(cntfrq_el0);
+
+    /* when (getauxval(AT_HWCAP) & HWCAP_CPUID), since 4.11*/
+    if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
+        printf("CPUID registers unavailable\n");
+        return 1;
+    } else {
+        printf("Checking CPUID registers\n");
+    }
+
+    get_cpu_reg(id_aa64isar0_el1);
+    get_cpu_reg(id_aa64isar1_el1);
+    get_cpu_reg(id_aa64mmfr0_el1);
+    get_cpu_reg(id_aa64mmfr1_el1);
+    get_cpu_reg(id_aa64pfr0_el1);
+    get_cpu_reg(id_aa64pfr1_el1);
+    get_cpu_reg(id_aa64dfr0_el1);
+    get_cpu_reg(id_aa64dfr1_el1);
+
+    get_cpu_reg(midr_el1);
+    get_cpu_reg(mpidr_el1);
+    get_cpu_reg(revidr_el1);
+
+    printf("Remaining registers should fail\n");
+    should_fail = true;
+
+    /* Unexposed register access causes SIGILL */
+    get_cpu_reg(id_mmfr0_el1);
+
+    if (should_not_fail_count > 0) {
+        int i;
+        for (i = 0; i < should_not_fail_count; i++) {
+            uintptr_t pc = failed_pc[i];
+            uint32_t insn = *(uint32_t *) pc;
+            printf("insn %#x @ %#lx unexpected FAIL\n", insn, pc);
+        }
+        return 1;
+    }
+
+    return should_fail_count == 1 ? 0 : 1;
+}