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[209.132.180.67]) by mx.google.com with ESMTP id a66-v6si4504706pfe.364.2018.06.27.11.31.21; Wed, 27 Jun 2018 11:31:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QSlnA5MY; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965905AbeF0SbT (ORCPT + 9 others); Wed, 27 Jun 2018 14:31:19 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:45104 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965892AbeF0SbQ (ORCPT ); Wed, 27 Jun 2018 14:31:16 -0400 X-Greylist: delayed 871 seconds by postgrey-1.27 at vger.kernel.org; Wed, 27 Jun 2018 14:31:14 EDT Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w5RIGWvQ081687; Wed, 27 Jun 2018 13:16:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530123392; bh=6GHaI4cTK+Vmw5Cw5lPUQreMOr9Z/tgoaZVxaPZpNxU=; h=From:To:CC:Subject:Date; b=QSlnA5MYlvE7Sm3m6zebRgqpQ1ui0gSFRKQvq5jbrYr/vcoylngtsLWsdLBSzRo2E 74+0WY1HIVpbVZMfAXjKgt9DfpSweIP3pD5RhVcFtKTDQTmkyl4uZoM2wGbdpBpHrm JuGSD2XONvu4Irwou3jLtpxjDHOzXq4THeMa8eSA= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5RIGWIh014380; Wed, 27 Jun 2018 13:16:32 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 27 Jun 2018 13:16:31 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 27 Jun 2018 13:16:31 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5RIGVR1000861; Wed, 27 Jun 2018 13:16:31 -0500 Received: from localhost (a0272616local-lt.dhcp.ti.com [172.22.173.184]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id w5RIGVx02147; Wed, 27 Jun 2018 13:16:31 -0500 (CDT) From: Dan Murphy To: , CC: , Dan Murphy Subject: [PATCH 1/2] net: phy: DP83TC811: Add INT_STAT3 Date: Wed, 27 Jun 2018 13:16:17 -0500 Message-ID: <20180627181618.23463-1-dmurphy@ti.com> X-Mailer: git-send-email 2.12.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add INT_STAT3 interrupt setting and clearing. Also fixed writing to INT_STAT2 when disabling the interrupts as there was a double write to INT_STAT1. Signed-off-by: Dan Murphy --- drivers/net/phy/dp83tc811.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) -- 2.17.0.582.gccdcbd54c diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c index 081d99aa3985..f8653f5d8789 100644 --- a/drivers/net/phy/dp83tc811.c +++ b/drivers/net/phy/dp83tc811.c @@ -21,6 +21,7 @@ #define MII_DP83811_SGMII_CTRL 0x09 #define MII_DP83811_INT_STAT1 0x12 #define MII_DP83811_INT_STAT2 0x13 +#define MII_DP83811_INT_STAT3 0x18 #define MII_DP83811_RESET_CTRL 0x1f #define DP83811_HW_RESET BIT(15) @@ -44,6 +45,11 @@ #define DP83811_OVERVOLTAGE_INT_EN BIT(6) #define DP83811_UNDERVOLTAGE_INT_EN BIT(7) +/* INT_STAT3 bits */ +#define DP83811_LPS_INT_EN BIT(0) +#define DP83811_NO_FRAME_INT_EN BIT(3) +#define DP83811_POR_DONE_INT_EN BIT(4) + #define MII_DP83811_RXSOP1 0x04a5 #define MII_DP83811_RXSOP2 0x04a6 #define MII_DP83811_RXSOP3 0x04a7 @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev) if (err < 0) return err; + err = phy_read(phydev, MII_DP83811_INT_STAT3); + if (err < 0) + return err; + return 0; } @@ -216,13 +226,29 @@ static int dp83811_config_intr(struct phy_device *phydev) DP83811_UNDERVOLTAGE_INT_EN); err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status); + if (err < 0) + return err; + + misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); + if (misr_status < 0) + return misr_status; + + misr_status |= (DP83811_LPS_INT_EN | + DP83811_NO_FRAME_INT_EN | + DP83811_POR_DONE_INT_EN); + + err = phy_write(phydev, MII_DP83811_INT_STAT3, misr_status); } else { err = phy_write(phydev, MII_DP83811_INT_STAT1, 0); if (err < 0) return err; - err = phy_write(phydev, MII_DP83811_INT_STAT1, 0); + err = phy_write(phydev, MII_DP83811_INT_STAT2, 0); + if (err < 0) + return err; + + err = phy_write(phydev, MII_DP83811_INT_STAT3, 0); } return err;