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[209.132.180.67]) by mx.google.com with ESMTP id a66-v6si4504706pfe.364.2018.06.27.11.31.25; Wed, 27 Jun 2018 11:31:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=HXs2GXwd; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965900AbeF0SbR (ORCPT + 9 others); Wed, 27 Jun 2018 14:31:17 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:45104 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965852AbeF0SbP (ORCPT ); Wed, 27 Jun 2018 14:31:15 -0400 X-Greylist: delayed 871 seconds by postgrey-1.27 at vger.kernel.org; Wed, 27 Jun 2018 14:31:14 EDT Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w5RIGWe1081691; Wed, 27 Jun 2018 13:16:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530123392; bh=F0rQXLg7+0EoPXScPZrn9GvnO8gzyMMKp4bxKxjSLu0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HXs2GXwdtd87x5mesDA7q6ZLNpAsnlOGdM/szhJocnw3veovPsZr3d7HTJCZ98aEI Ul+cYZVGVpJ6fILpaHy/CeAKqMl8Vq5jajlinYYML//2JlAMtSVXgj7oi9pNf90vt9 ilMmhiN9F+oYOL9RYAHKgp7EaIskoJg0XwTjH358= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5RIGW3L014389; Wed, 27 Jun 2018 13:16:32 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 27 Jun 2018 13:16:32 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 27 Jun 2018 13:16:32 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5RIGW1v013854; Wed, 27 Jun 2018 13:16:32 -0500 Received: from localhost (a0272616local-lt.dhcp.ti.com [172.22.173.184]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id w5RIGVx02154; Wed, 27 Jun 2018 13:16:31 -0500 (CDT) From: Dan Murphy To: , CC: , Dan Murphy Subject: [PATCH 2/2] net: phy: DP83TC811: Fix SGMII enable/disable Date: Wed, 27 Jun 2018 13:16:18 -0500 Message-ID: <20180627181618.23463-2-dmurphy@ti.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20180627181618.23463-1-dmurphy@ti.com> References: <20180627181618.23463-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org If SGMII was selected in the DT then the device should write the SGMII enable bit. If SGMII is not selected in the DT then the SGMII bit should be disabled. Signed-off-by: Dan Murphy --- arch/arm/configs/omap2plus_defconfig | 1 + drivers/net/phy/dp83tc811.c | 20 +++++++++----------- 2 files changed, 10 insertions(+), 11 deletions(-) -- 2.17.0.582.gccdcbd54c diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 06fb948ecfb3..30857d5b7a6c 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -182,6 +182,7 @@ CONFIG_TI_CPTS=y CONFIG_AT803X_PHY=y CONFIG_DP83848_PHY=y CONFIG_DP83867_PHY=y +CONFIG_DP83TC811_PHY=y CONFIG_MICREL_PHY=y CONFIG_SMSC_PHY=y CONFIG_PPP=m diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c index f8653f5d8789..78cad134a79e 100644 --- a/drivers/net/phy/dp83tc811.c +++ b/drivers/net/phy/dp83tc811.c @@ -284,21 +284,19 @@ static int dp83811_config_init(struct phy_device *phydev) if (err < 0) return err; + value = phy_read(phydev, MII_DP83811_SGMII_CTRL); if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { - value = phy_read(phydev, MII_DP83811_SGMII_CTRL); - if (!(value & DP83811_SGMII_EN)) { - err = phy_write(phydev, MII_DP83811_SGMII_CTRL, + err = phy_write(phydev, MII_DP83811_SGMII_CTRL, (DP83811_SGMII_EN | value)); - if (err < 0) - return err; - } else { - err = phy_write(phydev, MII_DP83811_SGMII_CTRL, - (~DP83811_SGMII_EN & value)); - if (err < 0) - return err; - } + } else { + err = phy_write(phydev, MII_DP83811_SGMII_CTRL, + (~DP83811_SGMII_EN & value)); } + if (err < 0) + + return err; + value = DP83811_WOL_MAGIC_EN | DP83811_WOL_SECURE_ON | DP83811_WOL_EN; return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,