diff mbox series

[net-next,v2,1/2] net: phy: DP83TC811: Add INT_STAT3

Message ID 20180629153546.24107-1-dmurphy@ti.com
State Accepted
Commit 42036383599e53fc4b3d9aab52d1492c561ab650
Headers show
Series [net-next,v2,1/2] net: phy: DP83TC811: Add INT_STAT3 | expand

Commit Message

Dan Murphy June 29, 2018, 3:35 p.m. UTC
Add INT_STAT3 interrupt setting and clearing
support.

Signed-off-by: Dan Murphy <dmurphy@ti.com>

---

v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts

 drivers/net/phy/dp83tc811.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

-- 
2.17.0.582.gccdcbd54c

Comments

Andrew Lunn June 29, 2018, 3:45 p.m. UTC | #1
On Fri, Jun 29, 2018 at 10:35:45AM -0500, Dan Murphy wrote:
> Add INT_STAT3 interrupt setting and clearing

> support.

> 

> Signed-off-by: Dan Murphy <dmurphy@ti.com>

> ---

> 

> v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts

> 

>  drivers/net/phy/dp83tc811.c | 26 ++++++++++++++++++++++++++

>  1 file changed, 26 insertions(+)

> 

> diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c

> index 49ac678eb2dc..f8653f5d8789 100644

> --- a/drivers/net/phy/dp83tc811.c

> +++ b/drivers/net/phy/dp83tc811.c

> @@ -21,6 +21,7 @@

>  #define MII_DP83811_SGMII_CTRL	0x09

>  #define MII_DP83811_INT_STAT1	0x12

>  #define MII_DP83811_INT_STAT2	0x13

> +#define MII_DP83811_INT_STAT3	0x18

>  #define MII_DP83811_RESET_CTRL	0x1f

>  

>  #define DP83811_HW_RESET	BIT(15)

> @@ -44,6 +45,11 @@

>  #define DP83811_OVERVOLTAGE_INT_EN	BIT(6)

>  #define DP83811_UNDERVOLTAGE_INT_EN	BIT(7)

>  

> +/* INT_STAT3 bits */

> +#define DP83811_LPS_INT_EN	BIT(0)

> +#define DP83811_NO_FRAME_INT_EN	BIT(3)

> +#define DP83811_POR_DONE_INT_EN	BIT(4)

> +

>  #define MII_DP83811_RXSOP1	0x04a5

>  #define MII_DP83811_RXSOP2	0x04a6

>  #define MII_DP83811_RXSOP3	0x04a7

> @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev)

>  	if (err < 0)

>  		return err;

>  

> +	err = phy_read(phydev, MII_DP83811_INT_STAT3);

> +	if (err < 0)

> +		return err;

> +

>  	return 0;

>  }

>  

> @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev)

>  				DP83811_UNDERVOLTAGE_INT_EN);

>  

>  		err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status);


Hi Dan

Isn't this going to fail to apply because net-next says STAT1 here?

That is why i said you need to wait for David to merge net into
net-next. Then you can submit these patches, and not have conflicts.

	  Andrew
Dan Murphy June 29, 2018, 4:17 p.m. UTC | #2
Andrew

On 06/29/2018 10:45 AM, Andrew Lunn wrote:
> On Fri, Jun 29, 2018 at 10:35:45AM -0500, Dan Murphy wrote:

>> Add INT_STAT3 interrupt setting and clearing

>> support.

>>

>> Signed-off-by: Dan Murphy <dmurphy@ti.com>

>> ---

>>

>> v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts

>>

>>  drivers/net/phy/dp83tc811.c | 26 ++++++++++++++++++++++++++

>>  1 file changed, 26 insertions(+)

>>

>> diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c

>> index 49ac678eb2dc..f8653f5d8789 100644

>> --- a/drivers/net/phy/dp83tc811.c

>> +++ b/drivers/net/phy/dp83tc811.c

>> @@ -21,6 +21,7 @@

>>  #define MII_DP83811_SGMII_CTRL	0x09

>>  #define MII_DP83811_INT_STAT1	0x12

>>  #define MII_DP83811_INT_STAT2	0x13

>> +#define MII_DP83811_INT_STAT3	0x18

>>  #define MII_DP83811_RESET_CTRL	0x1f

>>  

>>  #define DP83811_HW_RESET	BIT(15)

>> @@ -44,6 +45,11 @@

>>  #define DP83811_OVERVOLTAGE_INT_EN	BIT(6)

>>  #define DP83811_UNDERVOLTAGE_INT_EN	BIT(7)

>>  

>> +/* INT_STAT3 bits */

>> +#define DP83811_LPS_INT_EN	BIT(0)

>> +#define DP83811_NO_FRAME_INT_EN	BIT(3)

>> +#define DP83811_POR_DONE_INT_EN	BIT(4)

>> +

>>  #define MII_DP83811_RXSOP1	0x04a5

>>  #define MII_DP83811_RXSOP2	0x04a6

>>  #define MII_DP83811_RXSOP3	0x04a7

>> @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev)

>>  	if (err < 0)

>>  		return err;

>>  

>> +	err = phy_read(phydev, MII_DP83811_INT_STAT3);

>> +	if (err < 0)

>> +		return err;

>> +

>>  	return 0;

>>  }

>>  

>> @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev)

>>  				DP83811_UNDERVOLTAGE_INT_EN);

>>  

>>  		err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status);

> 

> Hi Dan

> 

> Isn't this going to fail to apply because net-next says STAT1 here?

> 


Yes but this should not be a pre-requisite for a code review.

Maybe I should have put the RFC in the subject.

> That is why i said you need to wait for David to merge net into

> net-next. Then you can submit these patches, and not have conflicts.

> 

> 	  Andrew

> 



-- 
------------------
Dan Murphy
Dan Murphy July 2, 2018, 2 p.m. UTC | #3
Andrew

On 06/29/2018 11:17 AM, Dan Murphy wrote:
> Andrew

> 

> On 06/29/2018 10:45 AM, Andrew Lunn wrote:

>> On Fri, Jun 29, 2018 at 10:35:45AM -0500, Dan Murphy wrote:

>>> Add INT_STAT3 interrupt setting and clearing

>>> support.

>>>

>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>

>>> ---

>>>

>>> v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts

>>>

>>>  drivers/net/phy/dp83tc811.c | 26 ++++++++++++++++++++++++++

>>>  1 file changed, 26 insertions(+)

>>>

>>> diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c

>>> index 49ac678eb2dc..f8653f5d8789 100644

>>> --- a/drivers/net/phy/dp83tc811.c

>>> +++ b/drivers/net/phy/dp83tc811.c

>>> @@ -21,6 +21,7 @@

>>>  #define MII_DP83811_SGMII_CTRL	0x09

>>>  #define MII_DP83811_INT_STAT1	0x12

>>>  #define MII_DP83811_INT_STAT2	0x13

>>> +#define MII_DP83811_INT_STAT3	0x18

>>>  #define MII_DP83811_RESET_CTRL	0x1f

>>>  

>>>  #define DP83811_HW_RESET	BIT(15)

>>> @@ -44,6 +45,11 @@

>>>  #define DP83811_OVERVOLTAGE_INT_EN	BIT(6)

>>>  #define DP83811_UNDERVOLTAGE_INT_EN	BIT(7)

>>>  

>>> +/* INT_STAT3 bits */

>>> +#define DP83811_LPS_INT_EN	BIT(0)

>>> +#define DP83811_NO_FRAME_INT_EN	BIT(3)

>>> +#define DP83811_POR_DONE_INT_EN	BIT(4)

>>> +

>>>  #define MII_DP83811_RXSOP1	0x04a5

>>>  #define MII_DP83811_RXSOP2	0x04a6

>>>  #define MII_DP83811_RXSOP3	0x04a7

>>> @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev)

>>>  	if (err < 0)

>>>  		return err;

>>>  

>>> +	err = phy_read(phydev, MII_DP83811_INT_STAT3);

>>> +	if (err < 0)

>>> +		return err;

>>> +

>>>  	return 0;

>>>  }

>>>  

>>> @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev)

>>>  				DP83811_UNDERVOLTAGE_INT_EN);

>>>  

>>>  		err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status);

>>

>> Hi Dan

>>

>> Isn't this going to fail to apply because net-next says STAT1 here?

>>

> 

> Yes but this should not be a pre-requisite for a code review.

> 

> Maybe I should have put the RFC in the subject.

> 

>> That is why i said you need to wait for David to merge net into

>> net-next. Then you can submit these patches, and not have conflicts.

>>


David has applied the pre-requisite patch so this series can be review and tested.

Dan

>> 	  Andrew

>>

> 

> 



-- 
------------------
Dan Murphy
David Miller July 3, 2018, 2:38 a.m. UTC | #4
From: Dan Murphy <dmurphy@ti.com>

Date: Fri, 29 Jun 2018 10:35:45 -0500

> Add INT_STAT3 interrupt setting and clearing

> support.

> 

> Signed-off-by: Dan Murphy <dmurphy@ti.com>

> ---

> 

> v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts


Applied.
diff mbox series

Patch

diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c
index 49ac678eb2dc..f8653f5d8789 100644
--- a/drivers/net/phy/dp83tc811.c
+++ b/drivers/net/phy/dp83tc811.c
@@ -21,6 +21,7 @@ 
 #define MII_DP83811_SGMII_CTRL	0x09
 #define MII_DP83811_INT_STAT1	0x12
 #define MII_DP83811_INT_STAT2	0x13
+#define MII_DP83811_INT_STAT3	0x18
 #define MII_DP83811_RESET_CTRL	0x1f
 
 #define DP83811_HW_RESET	BIT(15)
@@ -44,6 +45,11 @@ 
 #define DP83811_OVERVOLTAGE_INT_EN	BIT(6)
 #define DP83811_UNDERVOLTAGE_INT_EN	BIT(7)
 
+/* INT_STAT3 bits */
+#define DP83811_LPS_INT_EN	BIT(0)
+#define DP83811_NO_FRAME_INT_EN	BIT(3)
+#define DP83811_POR_DONE_INT_EN	BIT(4)
+
 #define MII_DP83811_RXSOP1	0x04a5
 #define MII_DP83811_RXSOP2	0x04a6
 #define MII_DP83811_RXSOP3	0x04a7
@@ -81,6 +87,10 @@  static int dp83811_ack_interrupt(struct phy_device *phydev)
 	if (err < 0)
 		return err;
 
+	err = phy_read(phydev, MII_DP83811_INT_STAT3);
+	if (err < 0)
+		return err;
+
 	return 0;
 }
 
@@ -216,6 +226,18 @@  static int dp83811_config_intr(struct phy_device *phydev)
 				DP83811_UNDERVOLTAGE_INT_EN);
 
 		err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status);
+		if (err < 0)
+			return err;
+
+		misr_status = phy_read(phydev, MII_DP83811_INT_STAT3);
+		if (misr_status < 0)
+			return misr_status;
+
+		misr_status |= (DP83811_LPS_INT_EN |
+				DP83811_NO_FRAME_INT_EN |
+				DP83811_POR_DONE_INT_EN);
+
+		err = phy_write(phydev, MII_DP83811_INT_STAT3, misr_status);
 
 	} else {
 		err = phy_write(phydev, MII_DP83811_INT_STAT1, 0);
@@ -223,6 +245,10 @@  static int dp83811_config_intr(struct phy_device *phydev)
 			return err;
 
 		err = phy_write(phydev, MII_DP83811_INT_STAT2, 0);
+		if (err < 0)
+			return err;
+
+		err = phy_write(phydev, MII_DP83811_INT_STAT3, 0);
 	}
 
 	return err;