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[209.132.180.67]) by mx.google.com with ESMTP id v14-v6si11150033pga.270.2018.07.09.04.44.12; Mon, 09 Jul 2018 04:44:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=krGIEz4i; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754529AbeGILoK (ORCPT + 13 others); Mon, 9 Jul 2018 07:44:10 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:36436 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754523AbeGILoH (ORCPT ); Mon, 9 Jul 2018 07:44:07 -0400 Received: by mail-pl0-f65.google.com with SMTP id a7-v6so5932238plp.3 for ; Mon, 09 Jul 2018 04:44:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=6BLPkOT/SgEgQAvO08/wD9B+TzSAkRr3OD36saLthVg=; b=krGIEz4i4NdigSSlPbjl9Y+cWuquQd3yMIMxvCdLjIbXTfU9rP6NzwGhxRVfSqbvup 4NwX9wDbE7Fmxgxhi0oj0AbguwfwK/BfsbuM8ZyvxMJ7d0IQhvG7Vf7CZXdmR+thymRN /6SBPXd3WuxYJGI+Y+0/xSh6qA85sUt28Nrjs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=6BLPkOT/SgEgQAvO08/wD9B+TzSAkRr3OD36saLthVg=; b=ncGxn5tw+w3uuDwT3PW9L36AHBdsdrTHN4xsxjsWew8mQhft2qtYJcZacA4erueaKM AzFg+qEs68DnO8m1SXhVe3sRqXq7RG8kU2v9fdtq0hsRH6TlJWQ7VrnqQJdl+ONM2Vmx o8ZYM1lYjlQsRV5O7/77eXYwpfmjVbvWqBkvIlzv3O6Doa8wfhGXw/iCyBbeXYl3FZOu wSSG1MNqzt3k2ZR9id2uQGy949R0dUGLlS5Y4NrR7NrKM3LsjMPymY0w499N8aBOCdc+ Ufpi+ubby9bzxI8IBaX6+o5n3vBNqaKVtG47BPtlUufoazZ4x6VAsS4SHSew5bSHYmQb FPyg== X-Gm-Message-State: APt69E1eujRUzGf8V7GRJAjgnkEmudTZBSBKZsLisX/QlehM6LNlT1YP FKc7y031ofkcd8ZOzomY1TUuOg== X-Received: by 2002:a17:902:6b86:: with SMTP id p6-v6mr20395916plk.75.1531136646865; Mon, 09 Jul 2018 04:44:06 -0700 (PDT) Received: from localhost ([103.249.91.93]) by smtp.gmail.com with ESMTPSA id n18-v6sm32311344pfa.50.2018.07.09.04.44.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Jul 2018 04:44:06 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, Zhang Rui , linux-pm@vger.kernel.org Subject: [PATCH v6 2/7] thermal: tsens: Add support to split up register address space into two Date: Mon, 9 Jul 2018 17:13:24 +0530 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There are two banks of registers for v2 TSENS IPs: SROT and TM. On older SoCs these were contiguous, leading to DTs mapping them as one register address space of size 0x2000. In newer SoCs, these two banks are not contiguous anymore. Fixing old DTs to split the address space into allows us to have cleaner common code e.g. get_temp() that is shared across new and old platforms. But we need to add logic to init_common() to differentiate between old and new DTs and adjust associated offsets for the TM register bank so that the old DTs will continue to function correctly. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8996.c | 2 +- drivers/thermal/qcom/tsens-common.c | 11 +++++++++++ drivers/thermal/qcom/tsens.h | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Bjorn Andersson diff --git a/drivers/thermal/qcom/tsens-8996.c b/drivers/thermal/qcom/tsens-8996.c index e1f7781..60765b1 100644 --- a/drivers/thermal/qcom/tsens-8996.c +++ b/drivers/thermal/qcom/tsens-8996.c @@ -28,7 +28,7 @@ static int get_temp_8996(struct tsens_device *tmdev, int id, int *temp) unsigned int sensor_addr; int last_temp = 0, last_temp2 = 0, last_temp3 = 0, ret; - sensor_addr = STATUS_OFFSET + s->hw_id * 4; + sensor_addr = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * 4; ret = regmap_read(tmdev->map, sensor_addr, &code); if (ret) return ret; diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index b1449ad..4a741b0 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include "tsens.h" @@ -126,11 +127,21 @@ static const struct regmap_config tsens_config = { int __init init_common(struct tsens_device *tmdev) { void __iomem *base; + struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); + if (!op) + return -EINVAL; base = of_iomap(tmdev->dev->of_node, 0); if (!base) return -EINVAL; + if (op->num_resources > 1) { + tmdev->tm_offset = 0; + } else { + /* old DTs where SROT and TM were in a contiguous 2K block */ + tmdev->tm_offset = 0x1000; + } + tmdev->map = devm_regmap_init_mmio(tmdev->dev, base, &tsens_config); if (IS_ERR(tmdev->map)) { iounmap(base); diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index dc56e1e..d785b37 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -77,6 +77,7 @@ struct tsens_device { struct device *dev; u32 num_sensors; struct regmap *map; + u32 tm_offset; struct tsens_context ctx; const struct tsens_ops *ops; struct tsens_sensor sensor[0];