[2/2] sparc64: add reads{b,w,l}/writes{b,w,l}

Message ID 20180711120824.3882108-2-arnd@arndb.de
State Accepted
Commit 15280e8107e17a5ee40509e3d1384ad28d6fdcf4
Headers show
Series
  • [1/2] ia64: use asm-generic/io.h
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Commit Message

Arnd Bergmann July 11, 2018, 12:08 p.m.
Some drivers need these for compile-testing. On most architectures
they come from asm-generic/io.h, but not on sparc64, which has its
own definitions.

Since we already have ioread*_rep()/iowrite*_rep() that have the
same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),
we can rename the existing helpers and add macros to define them
to the same implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

---
 arch/sparc/include/asm/io_64.h | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

-- 
2.9.0

Comments

David Miller July 12, 2018, 2:52 a.m. | #1
From: Arnd Bergmann <arnd@arndb.de>

Date: Wed, 11 Jul 2018 14:08:06 +0200

> Some drivers need these for compile-testing. On most architectures

> they come from asm-generic/io.h, but not on sparc64, which has its

> own definitions.

> 

> Since we already have ioread*_rep()/iowrite*_rep() that have the

> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),

> we can rename the existing helpers and add macros to define them

> to the same implementation.

> 

> Signed-off-by: Arnd Bergmann <arnd@arndb.de>


Acked-by: David S. Miller <davem@davemloft.net>
Boris Brezillon July 20, 2018, 8:23 a.m. | #2
+Miquel who's in charge of the NAND tree for this release

On Wed, 11 Jul 2018 14:08:06 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> Some drivers need these for compile-testing. On most architectures

> they come from asm-generic/io.h, but not on sparc64, which has its

> own definitions.

> 

> Since we already have ioread*_rep()/iowrite*_rep() that have the

> same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),

> we can rename the existing helpers and add macros to define them

> to the same implementation.

> 

> Signed-off-by: Arnd Bergmann <arnd@arndb.de>


I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the
orion and s3c2410 NAND drivers enabled and it compiles fine (it does
without this patch). So it seems to fix the compilation error reported
by kbuild robots.

Tested-by: Boris Brezillon <boris.brezillon@bootlin>

(only compile-tested)

Dave gave his A-b, so, if everyone is okay with that, I'd like this
patch to go trough the NAND tree.

Thanks,

Boris

> ---

>  arch/sparc/include/asm/io_64.h | 19 +++++++++++++------

>  1 file changed, 13 insertions(+), 6 deletions(-)

> 

> diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h

> index 9a1e9cbc7e6d..b162c23ae8c2 100644

> --- a/arch/sparc/include/asm/io_64.h

> +++ b/arch/sparc/include/asm/io_64.h

> @@ -243,35 +243,42 @@ void insb(unsigned long, void *, unsigned long);

>  void insw(unsigned long, void *, unsigned long);

>  void insl(unsigned long, void *, unsigned long);

>  

> -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)

> +static inline void readsb(void __iomem *port, void *buf, unsigned long count)

>  {

>  	insb((unsigned long __force)port, buf, count);

>  }

> -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)

> +static inline void readsw(void __iomem *port, void *buf, unsigned long count)

>  {

>  	insw((unsigned long __force)port, buf, count);

>  }

>  

> -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)

> +static inline void readsl(void __iomem *port, void *buf, unsigned long count)

>  {

>  	insl((unsigned long __force)port, buf, count);

>  }

>  

> -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)

> +static inline void writesb(void __iomem *port, const void *buf, unsigned long count)

>  {

>  	outsb((unsigned long __force)port, buf, count);

>  }

>  

> -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)

> +static inline void writesw(void __iomem *port, const void *buf, unsigned long count)

>  {

>  	outsw((unsigned long __force)port, buf, count);

>  }

>  

> -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)

> +static inline void writesl(void __iomem *port, const void *buf, unsigned long count)

>  {

>  	outsl((unsigned long __force)port, buf, count);

>  }

>  

> +#define ioread8_rep(p,d,l)	readsb(p,d,l)

> +#define ioread16_rep(p,d,l)	readsw(p,d,l)

> +#define ioread32_rep(p,d,l)	readsl(p,d,l)

> +#define iowrite8_rep(p,d,l)	writesb(p,d,l)

> +#define iowrite16_rep(p,d,l)	writesw(p,d,l)

> +#define iowrite32_rep(p,d,l)	writesl(p,d,l)

> +

>  /* Valid I/O Space regions are anywhere, because each PCI bus supported

>   * can live in an arbitrary area of the physical address range.

>   */
Miquel Raynal July 26, 2018, 11:27 p.m. | #3
Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Fri, 20 Jul 2018
10:23:39 +0200:

> +Miquel who's in charge of the NAND tree for this release

> 

> On Wed, 11 Jul 2018 14:08:06 +0200

> Arnd Bergmann <arnd@arndb.de> wrote:

> 

> > Some drivers need these for compile-testing. On most architectures

> > they come from asm-generic/io.h, but not on sparc64, which has its

> > own definitions.

> > 

> > Since we already have ioread*_rep()/iowrite*_rep() that have the

> > same behavior on sparc64 (i.e. all PCI I/O space is memory mapped),

> > we can rename the existing helpers and add macros to define them

> > to the same implementation.

> > 

> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>  

> 

> I tried to compile a sparc64 kernel with COMPILE_TEST=y plus the

> orion and s3c2410 NAND drivers enabled and it compiles fine (it does

> without this patch). So it seems to fix the compilation error reported

> by kbuild robots.

> 

> Tested-by: Boris Brezillon <boris.brezillon@bootlin>

> (only compile-tested)

> 

> Dave gave his A-b, so, if everyone is okay with that, I'd like this

> patch to go trough the NAND tree.


Applied to nand/next.

Thanks,
Miquèl

Patch

diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 9a1e9cbc7e6d..b162c23ae8c2 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -243,35 +243,42 @@  void insb(unsigned long, void *, unsigned long);
 void insw(unsigned long, void *, unsigned long);
 void insl(unsigned long, void *, unsigned long);
 
-static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsb(void __iomem *port, void *buf, unsigned long count)
 {
 	insb((unsigned long __force)port, buf, count);
 }
-static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsw(void __iomem *port, void *buf, unsigned long count)
 {
 	insw((unsigned long __force)port, buf, count);
 }
 
-static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
+static inline void readsl(void __iomem *port, void *buf, unsigned long count)
 {
 	insl((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsb((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsw((unsigned long __force)port, buf, count);
 }
 
-static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
+static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
 {
 	outsl((unsigned long __force)port, buf, count);
 }
 
+#define ioread8_rep(p,d,l)	readsb(p,d,l)
+#define ioread16_rep(p,d,l)	readsw(p,d,l)
+#define ioread32_rep(p,d,l)	readsl(p,d,l)
+#define iowrite8_rep(p,d,l)	writesb(p,d,l)
+#define iowrite16_rep(p,d,l)	writesw(p,d,l)
+#define iowrite32_rep(p,d,l)	writesl(p,d,l)
+
 /* Valid I/O Space regions are anywhere, because each PCI bus supported
  * can live in an arbitrary area of the physical address range.
  */