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[5/5] target/arm: Treat SCTLR_EL1.M as if it were zero when HCR_EL2.TGE is set

Message ID 20180724115950.17316-6-peter.maydell@linaro.org
State Superseded
Headers show
Series target/arm: Implement HCR_EL2.TGE ("trap general exceptions") | expand

Commit Message

Peter Maydell July 24, 2018, 11:59 a.m. UTC 
One of the required effects of setting HCR_EL2.TGE is that when
SCR_EL3.NS is 1 then SCTLR_EL1.M must behave as if it is zero for
all purposes except direct reads. That is, it effectively disables
the MMU for the NS EL0/EL1 translation regime.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/helper.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.17.1

Comments

Richard Henderson July 24, 2018, 6:51 p.m. UTC | #1 
On 07/24/2018 04:59 AM, Peter Maydell wrote:
> One of the required effects of setting HCR_EL2.TGE is that when

> SCR_EL3.NS is 1 then SCTLR_EL1.M must behave as if it is zero for

> all purposes except direct reads. That is, it effectively disables

> the MMU for the NS EL0/EL1 translation regime.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>  target/arm/helper.c | 8 ++++++++

>  1 file changed, 8 insertions(+)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 699189ebd7b..efd258fdb59 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8402,6 +8402,14 @@  static inline bool regime_translation_disabled(CPUARMState *env,
     if (mmu_idx == ARMMMUIdx_S2NS) {
         return (env->cp15.hcr_el2 & HCR_VM) == 0;
     }
+
+    if (env->cp15.hcr_el2 & HCR_TGE) {
+        /* TGE means that NS EL0/1 act as if SCTLR_EL1.M is zero */
+        if (!regime_is_secure(env, mmu_idx) && regime_el(env, mmu_idx) == 1) {
+            return true;
+        }
+    }
+
     return (regime_sctlr(env, mmu_idx) & SCTLR_M) == 0;
 }