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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:31 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel Subject: [PATCH 2/4] crypto/arm64: aes-ccm - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:22 +0200 Message-Id: <20180724171224.17363-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Only perform the NEON yield check for every 8 blocks of input, to prevent taking a considerable performance hit on cores with very fast crypto instructions and comparatively slow memory accesses, such as the Cortex-A53. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/aes-ce-ccm-core.S | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/arch/arm64/crypto/aes-ce-ccm-core.S b/arch/arm64/crypto/aes-ce-ccm-core.S index 88f5aef7934c..627710cdc220 100644 --- a/arch/arm64/crypto/aes-ce-ccm-core.S +++ b/arch/arm64/crypto/aes-ce-ccm-core.S @@ -208,6 +208,9 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */ st1 {v1.16b}, [x19], #16 /* write output block */ beq 5f + tst w21, #(0x7 * 16) /* yield every 8 blocks */ + b.ne 0b + if_will_cond_yield_neon st1 {v0.16b}, [x24] /* store mac */ do_cond_yield_neon