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[203.254.224.33]) by mx.google.com with ESMTP id g10si7049975pay.85.2013.01.31.21.31.43; Thu, 31 Jan 2013 21:31:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MHJ00C1W0OS9UM0@mailout3.samsung.com>; Fri, 01 Feb 2013 14:31:42 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id B3.E1.03918.E335B015; Fri, 01 Feb 2013 14:31:42 +0900 (KST) X-AuditID: cbfee61a-b7f7d6d000000f4e-0d-510b533ec90b Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 63.E1.03918.E335B015; Fri, 01 Feb 2013 14:31:42 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MHJ001630ONDT70@mmp1.samsung.com>; Fri, 01 Feb 2013 14:31:42 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 1/7 V3] EXYNOS5: Add function to enable XXTI clock source Date: Fri, 01 Feb 2013 11:09:36 +0530 Message-id: <1359697182-18843-2-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1359697182-18843-1-git-send-email-rajeshwari.s@samsung.com> References: <1359697182-18843-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrOLMWRmVeSWpSXmKPExsWyRsSkRtcumDvQYNo6DYuH62+yWEw5/IXF gcnjzrU9bAGMUVw2Kak5mWWpRfp2CVwZU2c+ZCz4xFsxqb+DrYFxH3cXIyeHhICJxNS9bWwQ tpjEhXvrgWwuDiGBpYwS+2cdZ+1i5AAratulDBFfxCixbvd2RghnIpNE953/7CDdbAJGEltP TmMEsUUEJCR+9V8Fs5kFYiRe7/8BtkFYwFPiRs8SVhCbRUBVYv/lq2BxXgEPibbFrawQVyhI HJv6FWwxJ1D9xqO8IGEhoJLWtfOYQPZKCNxnk2g9uQhqjoDEt8mHWCAOlZXYdIAZYoykxMEV N1gmMAovYGRYxSiaWpBcUJyUnmuoV5yYW1yal66XnJ+7iREYjKf/PZPawbiyweIQowAHoxIP b8F3rkAh1sSy4srcQ4wSHMxKIrxLHLkDhXhTEiurUovy44tKc1KLDzEmAy2fyCwlmpwPjJS8 knhDYxNzU2NTSyMjM1NT0oSVxHkZTz0JEBJITyxJzU5NLUgtgtnCxMEp1cB4ZlL9wTDb/y84 jss/v6IoOm3l33zdk7ZMwmkMn7OemjfXxIpPFle1OMw/b7G19NUzJo923X+1Lt214Gxq9fI3 lb4RT/8WvhW6rnmg7UFl/V/7wp2XHheJ6kVtrM/ZkOZ6hPHJ7C+rBTj/mp94ftyVTco/02ZC ePuyzNSezau11tdGHjhbLFamxFKckWioxVxUnAgAXsloN4oCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGIsWRmVeSWpSXmKPExsVy+t9jAV27YO5Ag6vnpCwerr/JYjHl8BcW ByaPO9f2sAUwRjUw2mSkJqakFimk5iXnp2TmpdsqeQfHO8ebmhkY6hpaWpgrKeQl5qbaKrn4 BOi6ZeYAzVZSKEvMKQUKBSQWFyvp22GaEBripmsB0xih6xsSBNdjZIAGEtYwZkyd+ZCx4BNv xaT+DrYGxn3cXYwcHBICJhJtu5S7GDmBTDGJC/fWs3UxcnEICSxilFi3ezsjhDORSaL7zn92 kCo2ASOJrSenMYLYIgISEr/6r4LZzAIxEq/3/2ADsYUFPCVu9CxhBbFZBFQl9l++ChbnFfCQ aFvcygqxTUHi2NSvrCBHcALVbzzKCxIWAippXTuPaQIj7wJGhlWMoqkFyQXFSem5hnrFibnF pXnpesn5uZsYwaH+TGoH48oGi0OMAhyMSjy8Bd+5AoVYE8uKK3MPMUpwMCuJ8C5x5A4U4k1J rKxKLcqPLyrNSS0+xJgMdNREZinR5HxgHOaVxBsam5ibGptamliYmFmSJqwkzst46kmAkEB6 YklqdmpqQWoRzBYmDk6pBkY5zitR9f0xugZzYhbPXXj4U7Rx8JGL8cZOtSyXPEtny2bEzF/0 M05Wb8uqM5s0P2nPFrxx+vqH2PDsrlnfGb+ueNunGKXb47Gv4v32aVKzyiat/vhkRuwFC65p oYxPBLIFZtaGXrGyyVmjbHVuYo+lz80J6+ZuYpzZ/3PqrHnGFtskGF63nryjxFKckWioxVxU nAgAuPk4xbkCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQnu0SWr8luTJf5INBXaH0aB6+SttFiBJMsUneLMQfIcEy/jqBpfx8cQu6j0JTMLqQ+DoVnL This patch adds funtion to enable XXTI clock source required by MAX98095 codec. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - Corrected multi-line comment style Chnages in V3: - None arch/arm/cpu/armv7/exynos/power.c | 11 +++++++++++ arch/arm/include/asm/arch-exynos/power.h | 11 +++++++++++ 2 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index 8572cfd..8de30c1 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -105,3 +105,14 @@ void power_ps_hold_setup(void) setbits_le32(&power->ps_hold_control, EXYNOS_PS_HOLD_CONTROL_DATA_HIGH); } + + +void power_enable_xclkout(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* use xxti for xclk out */ + clrsetbits_le32(&power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK, + PMU_DEBUG_XXTI); +} diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index 85e2cd9..9afd3ed 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -872,4 +872,15 @@ void set_dp_phy_ctrl(unsigned int enable); * (e.g. power button). */ void power_ps_hold_setup(void); + +/* PMU_DEBUG bits [12:8] = 0x1000 selects XXTI clock source */ +#define PMU_DEBUG_XXTI 0x1000 +/* Mask bit[12:8] for xxti clock selection */ +#define PMU_DEBUG_CLKOUT_SEL_MASK 0x1f00 + +/* + * Pmu debug is used for xclkout, enable xclkout with + * source as XXTI + */ +void power_enable_xclkout(void); #endif